add video parameter table/generator functions (fixes Popeye2 and others)
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2997
This commit is contained in:
Sebastian Strohhäcker
parent
9c45a245e8
commit
2d3e9c28e4
3 changed files with 502 additions and 3 deletions
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@ -122,6 +122,10 @@ typedef struct {
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RealPt font_14;
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RealPt font_16;
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RealPt static_state;
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RealPt video_save_pointers;
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RealPt video_parameter_table;
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RealPt video_save_pointer_table;
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RealPt video_dcc_table;
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RealPt oemstring;
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RealPt vesa_modes;
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RealPt pmode_interface;
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@ -32,7 +32,7 @@ static Bit8u static_functionality[0x10]=
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/* 8 */ 0x04, // total number of character blocks available in text modes
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/* 9 */ 0x02, // maximum number of active character blocks in text modes
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/* a */ 0xff, // Misc Flags Everthing supported
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/* b */ 0x0c, // Support for Display combination and intensity/blinking
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/* b */ 0x0e, // Support for Display combination, intensity/blinking and video state saving/restoring
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/* c */ 0x00, // reserved
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/* d */ 0x00, // reserved
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/* e */ 0x00, // Change to add new functions
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@ -57,7 +57,8 @@ void INT10_LoadFont(PhysPt font,bool reload,Bitu count,Bitu offset,Bitu map,Bitu
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IO_Write(0x3c4,0x2);
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IO_Write(0x3c5,0xf); //Enable all planes
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IO_Write(0x3ce,0x6);
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IO_Write(0x3cf,old_6); //odd/even and b8000 adressing
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if (IS_VGA_ARCH) IO_Write(0x3cf,old_6); //odd/even and b8000 adressing
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else IO_Write(0x3cf,0x0e);
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/* Reload tables and registers with new values based on this height */
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if (reload) {
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//Max scanline
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@ -72,6 +73,239 @@ void INT10_LoadFont(PhysPt font,bool reload,Bitu count,Bitu offset,Bitu map,Bitu
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}
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}
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static Bit8u video_parameter_table[0x40*0x1d]={
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// video parameter table for mode 0 (cga emulation)
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// video parameter table for mode 1 (cga emulation)
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// video parameter table for mode 2 (cga emulation)
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// video parameter table for mode 3 (cga emulation)
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// video parameter table for mode 4
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0x28, 0x18, 0x08, 0x00, 0x40, // bios data
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0x09, 0x00, 0x00, 0x02, // sequencer registers
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0x63, // misc output registers
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0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f, // crtc registers 0-7
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0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
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0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2, 0xff, // crtc registers 16-24
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0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07, // attr registers 0-7
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0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, // attr registers 8-15
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0x01, 0x00, 0x0f, 0x00, // attr registers 16-19
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0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x0f, 0x0f, 0xff, // graphics registers 0-8
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// video parameter table for mode 5
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0x28, 0x18, 0x08, 0x00, 0x40, // bios data
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0x09, 0x00, 0x00, 0x02, // sequencer registers
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0x63, // misc output registers
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0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f, // crtc registers 0-7
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0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
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0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2, 0xff, // crtc registers 16-24
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0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07, // attr registers 0-7
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0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, // attr registers 8-15
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0x01, 0x00, 0x0f, 0x00, // attr registers 16-19
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0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x0f, 0x0f, 0xff, // graphics registers 0-8
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// video parameter table for mode 6
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0x50, 0x18, 0x08, 0x00, 0x40, // bios data
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0x09, 0x0f, 0x00, 0x02, // sequencer registers
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0x63, // misc output registers
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0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, // crtc registers 0-7
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0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
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0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xc2, 0xff, // crtc registers 16-24
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0x00, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, // attr registers 0-7
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0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, // attr registers 8-15
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0x01, 0x00, 0x01, 0x00, // attr registers 16-19
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x0f, 0xff, // graphics registers 0-8
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// video parameter table for mode 7
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0x50, 0x18, 0x10, 0x00, 0x10, // bios data
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0x00, 0x0f, 0x00, 0x07, // sequencer registers
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0x66, // misc output registers
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0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, // crtc registers 0-7
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0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
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0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3, 0xff, // crtc registers 16-24
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, // attr registers 0-7
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0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, // attr registers 8-15
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0x0c, 0x00, 0x0f, 0x08, // attr registers 16-19
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0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x0f, 0xff, // graphics registers 0-8
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// video parameter table for mode 8
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// video parameter table for mode 9
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// video parameter table for mode a
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// video parameter table for mode b
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// video parameter table for mode c
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// video parameter table for mode d
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0x28, 0x18, 0x08, 0x00, 0x20, // bios data
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0x09, 0x0f, 0x00, 0x02, // sequencer registers
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0x63, // misc output registers
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0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f, // crtc registers 0-7
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0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
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0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xe3, 0xff, // crtc registers 16-24
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, // attr registers 0-7
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0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, // attr registers 8-15
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0x01, 0x00, 0x0f, 0x00, // attr registers 16-19
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff, // graphics registers 0-8
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// video parameter table for mode e
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0x50, 0x18, 0x08, 0x00, 0x40, // bios data
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0x01, 0x0f, 0x00, 0x02, // sequencer registers
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0x63, // misc output registers
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0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, // crtc registers 0-7
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0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
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0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xe3, 0xff, // crtc registers 16-24
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, // attr registers 0-7
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0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, // attr registers 8-15
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0x01, 0x00, 0x0f, 0x00, // attr registers 16-19
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff, // graphics registers 0-8
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// video parameter table for mode f (64k graphics memory)
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// video parameter table for mode 10 (64k graphics memory)
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// video parameter table for mode f (>64k graphics memory)
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0x50, 0x18, 0x0e, 0x00, 0x80, // bios data
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0x01, 0x0f, 0x00, 0x02, // sequencer registers
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0xa2, // misc output registers
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0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, // crtc registers 0-7
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0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
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0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3, 0xff, // crtc registers 16-24
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0x00, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, // attr registers 0-7
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0x00, 0x08, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, // attr registers 8-15
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0x0b, 0x00, 0x0f, 0x00, // attr registers 16-19
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff, // graphics registers 0-8
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// video parameter table for mode 10 (>64k graphics memory)
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0x50, 0x18, 0x0e, 0x00, 0x80, // bios data
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0x01, 0x0f, 0x00, 0x02, // sequencer registers
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0xa3, // misc output registers
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0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, // crtc registers 0-7
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0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
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0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3, 0xff, // crtc registers 16-24
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, // attr registers 0-7
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0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, // attr registers 8-15
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0x01, 0x00, 0x0f, 0x00, // attr registers 16-19
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff, // graphics registers 0-8
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// video parameter table for mode 0 (350 lines)
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// video parameter table for mode 1 (350 lines)
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
// video parameter table for mode 2 (350 lines)
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
// video parameter table for mode 3 (350 lines)
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
// video parameter table for mode e
|
||||
0x28, 0x18, 0x10, 0x00, 0x08, // bios data
|
||||
0x08, 0x0f, 0x00, 0x07, // sequencer registers
|
||||
0x67, // misc output registers
|
||||
0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f, // crtc registers 0-7
|
||||
0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
|
||||
0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3, 0xff, // crtc registers 16-24
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, // attr registers 0-7
|
||||
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, // attr registers 8-15
|
||||
0x0c, 0x00, 0x0f, 0x08, // attr registers 16-19
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff, // graphics registers 0-8
|
||||
// video parameter table for mode f
|
||||
0x50, 0x18, 0x10, 0x00, 0x10, // bios data
|
||||
0x00, 0x0f, 0x00, 0x07, // sequencer registers
|
||||
0x67, // misc output registers
|
||||
0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, // crtc registers 0-7
|
||||
0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
|
||||
0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3, 0xff, // crtc registers 16-24
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, // attr registers 0-7
|
||||
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, // attr registers 8-15
|
||||
0x0c, 0x00, 0x0f, 0x08, // attr registers 16-19
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff, // graphics registers 0-8
|
||||
// video parameter table for mode 10
|
||||
0x50, 0x18, 0x10, 0x00, 0x10, // bios data
|
||||
0x00, 0x0f, 0x00, 0x07, // sequencer registers
|
||||
0x66, // misc output registers
|
||||
0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, // crtc registers 0-7
|
||||
0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
|
||||
0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3, 0xff, // crtc registers 16-24
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, // attr registers 0-7
|
||||
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, // attr registers 8-15
|
||||
0x0c, 0x00, 0x0f, 0x08, // attr registers 16-19
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x0f, 0xff, // graphics registers 0-8
|
||||
// video parameter table for mode 11
|
||||
0x50, 0x1d, 0x10, 0x00, 0xa0, // bios data
|
||||
0x01, 0x0f, 0x00, 0x02, // sequencer registers
|
||||
0xe3, // misc output registers
|
||||
0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e, // crtc registers 0-7
|
||||
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
|
||||
0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xc3, 0xff, // crtc registers 16-24
|
||||
0x00, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, // attr registers 0-7
|
||||
0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, // attr registers 8-15
|
||||
0x01, 0x00, 0x0f, 0x00, // attr registers 16-19
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff, // graphics registers 0-8
|
||||
// video parameter table for mode 12
|
||||
0x50, 0x1d, 0x10, 0x00, 0xa0, // bios data
|
||||
0x01, 0x0f, 0x00, 0x02, // sequencer registers
|
||||
0xe3, // misc output registers
|
||||
0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e, // crtc registers 0-7
|
||||
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
|
||||
0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3, 0xff, // crtc registers 16-24
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, // attr registers 0-7
|
||||
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, // attr registers 8-15
|
||||
0x01, 0x00, 0x0f, 0x00, // attr registers 16-19
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff, // graphics registers 0-8
|
||||
// video parameter table for mode 13
|
||||
0x28, 0x18, 0x08, 0x00, 0x20, // bios data
|
||||
0x01, 0x0f, 0x00, 0x0e, // sequencer registers
|
||||
0x63, // misc output registers
|
||||
0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, // crtc registers 0-7
|
||||
0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // crtc registers 8-15
|
||||
0x9c, 0x8e, 0x8f, 0x28, 0x40, 0x96, 0xb9, 0xa3, 0xff, // crtc registers 16-24
|
||||
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, // attr registers 0-7
|
||||
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, // attr registers 8-15
|
||||
0x41, 0x00, 0x0f, 0x00, // attr registers 16-19
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f, 0xff, // graphics registers 0-8
|
||||
};
|
||||
|
||||
static Bitu checksumlocation = 0; //Same type as int10.rom.used
|
||||
void INT10_SetupRomMemory(void) {
|
||||
/* This should fill up certain structures inside the Video Bios Rom Area */
|
||||
|
|
@ -115,6 +349,79 @@ void INT10_SetupRomMemory(void) {
|
|||
}
|
||||
RealSetVec(0x1F,int10.rom.font_8_second);
|
||||
|
||||
if (IS_EGAVGA_ARCH) {
|
||||
int10.rom.video_parameter_table=RealMake(0xC000,int10.rom.used);
|
||||
if (IS_VGA_ARCH) {
|
||||
for (i=0;i<0x40*0x1d;i++) {
|
||||
phys_writeb(rom_base+int10.rom.used++,video_parameter_table[i]);
|
||||
}
|
||||
} else {
|
||||
// tables not correct (ega)
|
||||
for (i=0;i<0x40*0x17;i++) {
|
||||
phys_writeb(rom_base+int10.rom.used++,video_parameter_table[i]);
|
||||
}
|
||||
}
|
||||
|
||||
if (IS_VGA_ARCH) {
|
||||
int10.rom.video_dcc_table=RealMake(0xC000,int10.rom.used);
|
||||
phys_writeb(rom_base+int10.rom.used++,0x10); // number of entries
|
||||
phys_writeb(rom_base+int10.rom.used++,1); // version number
|
||||
phys_writeb(rom_base+int10.rom.used++,8); // maximal display code
|
||||
phys_writeb(rom_base+int10.rom.used++,0); // reserved
|
||||
// display combination codes
|
||||
phys_writew(rom_base+int10.rom.used,0x0000); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0100); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0200); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0102); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0400); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0104); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0500); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0502); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0600); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0601); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0605); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0800); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0801); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0700); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0702); int10.rom.used+=2;
|
||||
phys_writew(rom_base+int10.rom.used,0x0706); int10.rom.used+=2;
|
||||
|
||||
int10.rom.video_save_pointer_table=RealMake(0xC000,int10.rom.used);
|
||||
phys_writew(rom_base+int10.rom.used,0x1a); // length of table
|
||||
int10.rom.used+=2;
|
||||
phys_writed(rom_base+int10.rom.used,int10.rom.video_dcc_table);
|
||||
int10.rom.used+=4;
|
||||
phys_writed(rom_base+int10.rom.used,0); // alphanumeric charset override
|
||||
int10.rom.used+=4;
|
||||
phys_writed(rom_base+int10.rom.used,0); // user palette table
|
||||
int10.rom.used+=4;
|
||||
phys_writed(rom_base+int10.rom.used,0); int10.rom.used+=4;
|
||||
phys_writed(rom_base+int10.rom.used,0); int10.rom.used+=4;
|
||||
phys_writed(rom_base+int10.rom.used,0); int10.rom.used+=4;
|
||||
}
|
||||
|
||||
// use the following to generate/update the video parameter table:
|
||||
// void INT10_GenerateVideoParameterTable();
|
||||
// INT10_GenerateVideoParameterTable();
|
||||
int10.rom.video_save_pointers=RealMake(0xC000,int10.rom.used);
|
||||
phys_writed(rom_base+int10.rom.used,int10.rom.video_parameter_table);
|
||||
int10.rom.used+=4;
|
||||
phys_writed(rom_base+int10.rom.used,0); // dynamic save area pointer
|
||||
int10.rom.used+=4;
|
||||
phys_writed(rom_base+int10.rom.used,0); // alphanumeric character set override
|
||||
int10.rom.used+=4;
|
||||
phys_writed(rom_base+int10.rom.used,0); // graphics character set override
|
||||
int10.rom.used+=4;
|
||||
if (IS_VGA_ARCH) {
|
||||
phys_writed(rom_base+int10.rom.used,int10.rom.video_save_pointer_table);
|
||||
} else {
|
||||
phys_writed(rom_base+int10.rom.used,0); // secondary save pointer table
|
||||
}
|
||||
int10.rom.used+=4;
|
||||
phys_writed(rom_base+int10.rom.used,0); int10.rom.used+=4;
|
||||
phys_writed(rom_base+int10.rom.used,0); int10.rom.used+=4;
|
||||
}
|
||||
|
||||
if (IS_TANDY_ARCH) {
|
||||
RealSetVec(0x44,int10.rom.font_8_first);
|
||||
}
|
||||
|
|
@ -159,6 +466,194 @@ void INT10_SetupRomMemoryChecksum(void) {
|
|||
}
|
||||
|
||||
|
||||
void INT10_GenerateVideoParameterTable(void) {
|
||||
Bitu i;
|
||||
for (i=0; i<4; i++) {
|
||||
LOG_MSG("// video parameter table for mode %x (cga emulation)",i);
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
}
|
||||
for (i=4; i<0x0f; i++) {
|
||||
Bitu ct;
|
||||
LOG_MSG("// video parameter table for mode %x",i);
|
||||
if ((i>=8) && (i<0x0d)) {
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
} else {
|
||||
INT10_SetVideoMode(i);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // bios data",real_readb(0x40,0x4a),real_readb(0x40,0x84),real_readb(0x40,0x85),real_readb(0x40,0x4c),real_readb(0x40,0x4d));
|
||||
Bitu seq_regs[4];
|
||||
for (ct=0; ct<4; ct++) {
|
||||
IO_WriteB(0x3c4,ct+1);
|
||||
seq_regs[ct]=IO_ReadB(0x3c5);
|
||||
}
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, // sequencer registers",seq_regs[0],seq_regs[1],seq_regs[2],seq_regs[3]);
|
||||
LOG_MSG(" 0x%02x, // misc output registers",IO_ReadB(0x3cc));
|
||||
Bitu crtc_regs[4];
|
||||
Bit16u crt_addr=real_readw(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS);
|
||||
for (ct=0; ct<0x19; ct++) {
|
||||
IO_WriteB(crt_addr,ct);
|
||||
crtc_regs[ct]=IO_ReadB(crt_addr+1);
|
||||
}
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // crtc registers 0-7",
|
||||
crtc_regs[0x00],crtc_regs[0x01],crtc_regs[0x02],crtc_regs[0x03],
|
||||
crtc_regs[0x04],crtc_regs[0x05],crtc_regs[0x06],crtc_regs[0x07]);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // crtc registers 8-15",
|
||||
crtc_regs[0x08],crtc_regs[0x09],crtc_regs[0x0a],crtc_regs[0x0b],
|
||||
crtc_regs[0x0c],crtc_regs[0x0d],crtc_regs[0x0e],crtc_regs[0x0f]);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // crtc registers 16-24",
|
||||
crtc_regs[0x10],crtc_regs[0x11],crtc_regs[0x12],crtc_regs[0x13],
|
||||
crtc_regs[0x14],crtc_regs[0x15],crtc_regs[0x16],crtc_regs[0x17],crtc_regs[0x18]);
|
||||
Bitu attr_regs[4];
|
||||
for (ct=0; ct<0x14; ct++) {
|
||||
IO_ReadB(crt_addr+6);
|
||||
IO_WriteB(0x3c0,ct);
|
||||
attr_regs[ct]=IO_ReadB(0x3c1);
|
||||
}
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // attr registers 0-7",
|
||||
attr_regs[0x00],attr_regs[0x01],attr_regs[0x02],attr_regs[0x03],
|
||||
attr_regs[0x04],attr_regs[0x05],attr_regs[0x06],attr_regs[0x07]);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // attr registers 8-15",
|
||||
attr_regs[0x08],attr_regs[0x09],attr_regs[0x0a],attr_regs[0x0b],
|
||||
attr_regs[0x0c],attr_regs[0x0d],attr_regs[0x0e],attr_regs[0x0f]);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, // attr registers 16-19",
|
||||
attr_regs[0x10],attr_regs[0x11],attr_regs[0x12],attr_regs[0x13]);
|
||||
Bitu gfx_regs[4];
|
||||
for (ct=0; ct<0x09; ct++) {
|
||||
IO_WriteB(0x3ce,ct);
|
||||
gfx_regs[ct]=IO_ReadB(0x3cf);
|
||||
}
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // graphics registers 0-8",
|
||||
gfx_regs[0x00],gfx_regs[0x01],gfx_regs[0x02],gfx_regs[0x03],
|
||||
gfx_regs[0x04],gfx_regs[0x05],gfx_regs[0x06],gfx_regs[0x07],gfx_regs[0x08]);
|
||||
}
|
||||
}
|
||||
for (i=0x0f; i<0x11; i++) {
|
||||
LOG_MSG("// video parameter table for mode %x (64k graphics memory)",i);
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
}
|
||||
for (i=0x0f; i<0x11; i++) {
|
||||
Bitu ct;
|
||||
INT10_SetVideoMode(i);
|
||||
LOG_MSG("// video parameter table for mode %x (>64k graphics memory)",i);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // bios data",real_readb(0x40,0x4a),real_readb(0x40,0x84),real_readb(0x40,0x85),real_readb(0x40,0x4c),real_readb(0x40,0x4d));
|
||||
Bitu seq_regs[4];
|
||||
for (ct=0; ct<4; ct++) {
|
||||
IO_WriteB(0x3c4,ct+1);
|
||||
seq_regs[ct]=IO_ReadB(0x3c5);
|
||||
}
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, // sequencer registers",seq_regs[0],seq_regs[1],seq_regs[2],seq_regs[3]);
|
||||
LOG_MSG(" 0x%02x, // misc output registers",IO_ReadB(0x3cc));
|
||||
Bitu crtc_regs[4];
|
||||
Bit16u crt_addr=real_readw(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS);
|
||||
for (ct=0; ct<0x19; ct++) {
|
||||
IO_WriteB(crt_addr,ct);
|
||||
crtc_regs[ct]=IO_ReadB(crt_addr+1);
|
||||
}
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // crtc registers 0-7",
|
||||
crtc_regs[0x00],crtc_regs[0x01],crtc_regs[0x02],crtc_regs[0x03],
|
||||
crtc_regs[0x04],crtc_regs[0x05],crtc_regs[0x06],crtc_regs[0x07]);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // crtc registers 8-15",
|
||||
crtc_regs[0x08],crtc_regs[0x09],crtc_regs[0x0a],crtc_regs[0x0b],
|
||||
crtc_regs[0x0c],crtc_regs[0x0d],crtc_regs[0x0e],crtc_regs[0x0f]);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // crtc registers 16-24",
|
||||
crtc_regs[0x10],crtc_regs[0x11],crtc_regs[0x12],crtc_regs[0x13],
|
||||
crtc_regs[0x14],crtc_regs[0x15],crtc_regs[0x16],crtc_regs[0x17],crtc_regs[0x18]);
|
||||
Bitu attr_regs[4];
|
||||
for (ct=0; ct<0x14; ct++) {
|
||||
IO_ReadB(crt_addr+6);
|
||||
IO_WriteB(0x3c0,ct);
|
||||
attr_regs[ct]=IO_ReadB(0x3c1);
|
||||
}
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // attr registers 0-7",
|
||||
attr_regs[0x00],attr_regs[0x01],attr_regs[0x02],attr_regs[0x03],
|
||||
attr_regs[0x04],attr_regs[0x05],attr_regs[0x06],attr_regs[0x07]);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // attr registers 8-15",
|
||||
attr_regs[0x08],attr_regs[0x09],attr_regs[0x0a],attr_regs[0x0b],
|
||||
attr_regs[0x0c],attr_regs[0x0d],attr_regs[0x0e],attr_regs[0x0f]);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, // attr registers 16-19",
|
||||
attr_regs[0x10],attr_regs[0x11],attr_regs[0x12],attr_regs[0x13]);
|
||||
Bitu gfx_regs[4];
|
||||
for (ct=0; ct<0x09; ct++) {
|
||||
IO_WriteB(0x3ce,ct);
|
||||
gfx_regs[ct]=IO_ReadB(0x3cf);
|
||||
}
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // graphics registers 0-8",
|
||||
gfx_regs[0x00],gfx_regs[0x01],gfx_regs[0x02],gfx_regs[0x03],
|
||||
gfx_regs[0x04],gfx_regs[0x05],gfx_regs[0x06],gfx_regs[0x07],gfx_regs[0x08]);
|
||||
}
|
||||
for (i=0; i<4; i++) {
|
||||
LOG_MSG("// video parameter table for mode %x (350 lines)",i);
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
LOG_MSG(" 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,");
|
||||
}
|
||||
for (i=0x0e; i<0x14; i++) {
|
||||
Bitu ct=i;
|
||||
if (i==0x0e) ct=1;
|
||||
if (i==0x0f) ct=3;
|
||||
if (i==0x010) ct=7;
|
||||
INT10_SetVideoMode(ct);
|
||||
LOG_MSG("// video parameter table for mode %x",i);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // bios data",real_readb(0x40,0x4a),real_readb(0x40,0x84),real_readb(0x40,0x85),real_readb(0x40,0x4c),real_readb(0x40,0x4d));
|
||||
Bitu seq_regs[4];
|
||||
for (ct=0; ct<4; ct++) {
|
||||
IO_WriteB(0x3c4,ct+1);
|
||||
seq_regs[ct]=IO_ReadB(0x3c5);
|
||||
}
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, // sequencer registers",seq_regs[0],seq_regs[1],seq_regs[2],seq_regs[3]);
|
||||
LOG_MSG(" 0x%02x, // misc output registers",IO_ReadB(0x3cc));
|
||||
Bitu crtc_regs[4];
|
||||
Bit16u crt_addr=real_readw(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS);
|
||||
for (ct=0; ct<0x19; ct++) {
|
||||
IO_WriteB(crt_addr,ct);
|
||||
crtc_regs[ct]=IO_ReadB(crt_addr+1);
|
||||
}
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // crtc registers 0-7",
|
||||
crtc_regs[0x00],crtc_regs[0x01],crtc_regs[0x02],crtc_regs[0x03],
|
||||
crtc_regs[0x04],crtc_regs[0x05],crtc_regs[0x06],crtc_regs[0x07]);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // crtc registers 8-15",
|
||||
crtc_regs[0x08],crtc_regs[0x09],crtc_regs[0x0a],crtc_regs[0x0b],
|
||||
crtc_regs[0x0c],crtc_regs[0x0d],crtc_regs[0x0e],crtc_regs[0x0f]);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // crtc registers 16-24",
|
||||
crtc_regs[0x10],crtc_regs[0x11],crtc_regs[0x12],crtc_regs[0x13],
|
||||
crtc_regs[0x14],crtc_regs[0x15],crtc_regs[0x16],crtc_regs[0x17],crtc_regs[0x18]);
|
||||
Bitu attr_regs[4];
|
||||
for (ct=0; ct<0x14; ct++) {
|
||||
IO_ReadB(crt_addr+6);
|
||||
IO_WriteB(0x3c0,ct);
|
||||
attr_regs[ct]=IO_ReadB(0x3c1);
|
||||
}
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // attr registers 0-7",
|
||||
attr_regs[0x00],attr_regs[0x01],attr_regs[0x02],attr_regs[0x03],
|
||||
attr_regs[0x04],attr_regs[0x05],attr_regs[0x06],attr_regs[0x07]);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // attr registers 8-15",
|
||||
attr_regs[0x08],attr_regs[0x09],attr_regs[0x0a],attr_regs[0x0b],
|
||||
attr_regs[0x0c],attr_regs[0x0d],attr_regs[0x0e],attr_regs[0x0f]);
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, // attr registers 16-19",
|
||||
attr_regs[0x10],attr_regs[0x11],attr_regs[0x12],attr_regs[0x13]);
|
||||
Bitu gfx_regs[4];
|
||||
for (ct=0; ct<0x09; ct++) {
|
||||
IO_WriteB(0x3ce,ct);
|
||||
gfx_regs[ct]=IO_ReadB(0x3cf);
|
||||
}
|
||||
LOG_MSG(" 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, // graphics registers 0-8",
|
||||
gfx_regs[0x00],gfx_regs[0x01],gfx_regs[0x02],gfx_regs[0x03],
|
||||
gfx_regs[0x04],gfx_regs[0x05],gfx_regs[0x06],gfx_regs[0x07],gfx_regs[0x08]);
|
||||
}
|
||||
INT10_SetVideoMode(3);
|
||||
E_Exit("done!");
|
||||
}
|
||||
|
||||
|
||||
Bit8u int10_font_08[256 * 8] = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x7e, 0x81, 0xa5, 0x81, 0xbd, 0x99, 0x81, 0x7e,
|
||||
|
|
|
|||
|
|
@ -271,10 +271,10 @@ static void FinishSetMode(bool clearmem) {
|
|||
real_writeb(BIOSMEM_SEG,BIOSMEM_SWITCHES,0x09);
|
||||
real_writeb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL,real_readb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL)&0x7f);
|
||||
|
||||
// FIXME We nearly have the good tables. to be reworked
|
||||
if (IS_VGA_ARCH) real_writeb(BIOSMEM_SEG,BIOSMEM_DCC_INDEX,0x08); // 8 is VGA should be ok for now
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_VS_POINTER,0x00);
|
||||
real_writew(BIOSMEM_SEG,BIOSMEM_VS_POINTER+2,0x00);
|
||||
real_writed(BIOSMEM_SEG,BIOSMEM_VS_POINTER,int10.rom.video_save_pointers);
|
||||
|
||||
// Set cursor shape
|
||||
if(CurMode->type==M_TEXT) {
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue