better vga compatibility (rom strings, initial mode field) for 221b Baker Street/Coloring Book 2;
fixes for monochrome modes, clearmem flag; corrections from ih8regs Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2320
This commit is contained in:
Sebastian Strohhäcker
parent
9d8f00c6c3
commit
417fb048ba
6 changed files with 95 additions and 39 deletions
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@ -125,7 +125,7 @@ static Bitu INT10_Handler(void) {
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break;
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case 0x0F: /* Get videomode */
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reg_bh=real_readb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAGE);
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reg_al=real_readb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE);
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reg_al=real_readb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE)|(real_readb(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL)&0x80);
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reg_ah=(Bit8u)real_readw(BIOSMEM_SEG,BIOSMEM_NB_COLS);
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break;
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case 0x10: /* EGA/VGA Palette functions */
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@ -72,17 +72,20 @@ void INT10_LoadFont(PhysPt font,bool reload,Bitu count,Bitu offset,Bitu map,Bitu
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}
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}
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void INT10_SetupRomMemory(void) {
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/* This should fill up certain structures inside the Video Bios Rom Area */
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PhysPt rom_base=PhysMake(0xc000,0);
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Bitu i;
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int10.rom.used=3; // int10.rom.used=2; Size of ROM added
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int10.rom.used=3;
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if (machine==MCH_VGA) {
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// set up the start of the ROM
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phys_writew(rom_base+0,0xaa55);
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phys_writeb(rom_base+2,0x40); // Size of ROM: 64 512-blocks = 32KB
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phys_writeb(rom_base+2,0x40); // Size of ROM: 64 512-blocks = 32KB
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phys_writeb(rom_base+0x1e,0x49); // IBM string
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phys_writeb(rom_base+0x1f,0x42);
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phys_writeb(rom_base+0x20,0x4d);
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phys_writeb(rom_base+0x21,0x00);
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int10.rom.used=0x100;
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}
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int10.rom.font_8_first=RealMake(0xC000,int10.rom.used);
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for (i=0;i<128*8;i++) {
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@ -92,13 +92,13 @@ void INT10_GetFuncStateInformation(PhysPt save) {
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Bit16u col_count=0;
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switch (CurMode->type) {
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case M_TEXT:
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col_count=16;break;
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if (CurMode->mode==0x7) col_count=1; else col_count=16;break;
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case M_CGA2:
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col_count=2;break;
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case M_CGA4:
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col_count=4;break;
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case M_EGA16:
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col_count=16;break;
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if (CurMode->mode==0x11 || CurMode->mode==0x0f) col_count=2; else col_count=16;break;
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case M_VGA:
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col_count=256;break;
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default:
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@ -119,7 +119,9 @@ void INT10_GetFuncStateInformation(PhysPt save) {
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case 480:
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mem_writeb(save+0x2a,3);break;
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};
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//TODO Maybe misc flags
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/* misc flags */
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if (CurMode->type==M_TEXT) mem_writeb(save+0x2d,0x21);
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else mem_writeb(save+0x2d,0x01);
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/* Video Memory available */
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mem_writeb(save+0x31,3);
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}
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@ -38,9 +38,9 @@ VideoModeBlock ModeList_VGA[]={
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{ 0x001 ,M_TEXT ,360 ,400 ,40 ,25 ,9 ,16 ,8 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK },
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{ 0x002 ,M_TEXT ,720 ,400 ,80 ,25 ,9 ,16 ,8 ,0xB8000 ,0x1000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x003 ,M_TEXT ,720 ,400 ,80 ,25 ,9 ,16 ,8 ,0xB8000 ,0x1000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x004 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,4 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x005 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xB8000 ,0x0800 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x006 ,M_CGA2 ,640 ,200 ,80 ,25 ,8 ,8 ,1 ,0xB8000 ,0x0800 ,100 ,449 ,80 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x004 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xB8000 ,0x4000 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x005 ,M_CGA4 ,320 ,200 ,40 ,25 ,8 ,8 ,1 ,0xB8000 ,0x4000 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x006 ,M_CGA2 ,640 ,200 ,80 ,25 ,8 ,8 ,1 ,0xB8000 ,0x4000 ,100 ,449 ,80 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE},
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{ 0x007 ,M_TEXT ,720 ,400 ,80 ,25 ,9 ,16 ,8 ,0xB0000 ,0x1000 ,100 ,449 ,80 ,400 ,0 },
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{ 0x00D ,M_EGA16 ,320 ,200 ,40 ,25 ,8 ,8 ,8 ,0xA0000 ,0x2000 ,50 ,449 ,40 ,400 ,_EGA_HALF_CLOCK | _EGA_LINE_DOUBLE },
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@ -95,6 +95,18 @@ static Bit8u text_palette[64][3]=
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{0x15,0x15,0x15},{0x15,0x15,0x3f},{0x15,0x3f,0x15},{0x15,0x3f,0x3f},{0x3f,0x15,0x15},{0x3f,0x15,0x3f},{0x3f,0x3f,0x15},{0x3f,0x3f,0x3f}
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};
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static Bit8u mtext_palette[64][3]=
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{
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0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
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0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
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0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
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0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f,
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0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
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0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
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0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
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0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f
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};
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static Bit8u ega_palette[64][3]=
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{
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{0x00,0x00,0x00}, {0x00,0x00,0x2a}, {0x00,0x2a,0x00}, {0x00,0x2a,0x2a}, {0x2a,0x00,0x00}, {0x2a,0x00,0x2a}, {0x2a,0x15,0x00}, {0x2a,0x2a,0x2a},
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@ -210,10 +222,10 @@ static void FinishSetMode(bool clearmem) {
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else real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE,CurMode->mode-0x98); //Looks like the s3 bios
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real_writew(BIOSMEM_SEG,BIOSMEM_NB_COLS,CurMode->twidth);
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real_writew(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE,CurMode->plength);
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real_writew(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS,CurMode->mode==7 ? 0x3b4 : 0x3d4);
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real_writew(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS,((CurMode->mode==7 )|| (CurMode->mode==0x0f)) ? 0x3b4 : 0x3d4);
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real_writeb(BIOSMEM_SEG,BIOSMEM_NB_ROWS,CurMode->theight-1);
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real_writew(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT,CurMode->cheight);
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real_writeb(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL,(0x60|(clearmem << 7)));
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real_writeb(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL,(0x60|(clearmem?0:0x80)));
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real_writeb(BIOSMEM_SEG,BIOSMEM_SWITCHES,0x09);
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real_writeb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL,real_readb(BIOSMEM_SEG,BIOSMEM_MODESET_CTL)&0x7f);
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@ -358,9 +370,13 @@ bool INT10_SetVideoMode_OTHER(Bitu mode,bool clearmem) {
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bool INT10_SetVideoMode(Bitu mode) {
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bool clearmem=true;Bitu i;
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if ((mode<256) && (mode & 128)) {
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if (mode>=0x100) {
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if (mode & 0x8000) clearmem=false;
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mode&=0xfff;
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}
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if ((mode<0x100) && (mode & 0x80)) {
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clearmem=false;
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mode-=128;
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mode-=0x80;
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}
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LOG(LOG_INT10,LOG_NORMAL)("Set Video Mode %X",mode);
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if (machine!=MCH_VGA) return INT10_SetVideoMode_OTHER(mode,clearmem);
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@ -615,7 +631,7 @@ bool INT10_SetVideoMode(Bitu mode) {
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misc_control_2=0x0;
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break;
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}
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IO_WriteB(0x3d4,0x67);IO_WriteB(0x3d5,misc_control_2);
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IO_WriteB(crtc_base,0x67);IO_WriteB(crtc_base+1,misc_control_2);
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/* Write Misc Output */
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IO_Write(0x3c2,misc_output);
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/* Program Graphics controller */
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@ -654,10 +670,26 @@ bool INT10_SetVideoMode(Bitu mode) {
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switch (CurMode->type) {
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case M_EGA16:
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att_data[0x10]=0x01; //Color Graphics
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if (CurMode->mode>0xe) goto att_text16;
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switch (CurMode->mode) {
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case 0x0f:
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att_data[0x10]|=0x0a; //Monochrome
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att_data[0x01]=0x08;
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att_data[0x04]=0x18;
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att_data[0x05]=0x18;
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att_data[0x09]=0x08;
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att_data[0x0d]=0x18;
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break;
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case 0x11:
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for (i=1;i<16;i++) att_data[i]=0x3f;
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break;
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case 0x10:
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case 0x12: goto att_text16;
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default:
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for (i=0;i<8;i++) {
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att_data[i]=i;
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att_data[i+8]=i+0x10;
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att_data[i]=i;
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att_data[i+8]=i+0x10;
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}
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break;
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}
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break;
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case M_TANDY16:
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@ -667,6 +699,7 @@ bool INT10_SetVideoMode(Bitu mode) {
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case M_TEXT:
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att_data[0x13]=0x08; //Pel panning on 8, although we don't have 9 dot text mode
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att_data[0x10]=0x0C; //Color Text with blinking
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real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,0x30);
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att_text16:
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for (i=0;i<8;i++) {
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att_data[i]=i;
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@ -709,7 +742,8 @@ att_text16:
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IO_Write(0x3c8,0);
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switch (CurMode->type) {
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case M_EGA16:
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if (CurMode->mode>0xe) goto dac_text16;
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if (CurMode->mode>0xf) goto dac_text16;
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else if (CurMode->mode==0xf) goto dac_mtext16;
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for (i=0;i<64;i++) {
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IO_Write(0x3c9,ega_palette[i][0]);
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IO_Write(0x3c9,ega_palette[i][1]);
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@ -726,6 +760,15 @@ att_text16:
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}
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break;
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case M_TEXT:
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if (CurMode->mode==7) {
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dac_mtext16:
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for (i=0;i<64;i++) {
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IO_Write(0x3c9,mtext_palette[i][0]);
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IO_Write(0x3c9,mtext_palette[i][1]);
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IO_Write(0x3c9,mtext_palette[i][2]);
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}
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break;
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}
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dac_text16:
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for (i=0;i<64;i++) {
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IO_Write(0x3c9,text_palette[i][0]);
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@ -760,6 +803,12 @@ dac_text16:
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break;
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case M_TEXT:
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feature=(feature&~0x30)|0x20;
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switch (CurMode->mode) {
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case 0:real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x2c);break;
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case 1:real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x28);break;
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case 2:real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x2d);break;
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case 3:real_writeb(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x29);break;
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}
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break;
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case M_EGA16:
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case M_VGA:
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@ -767,7 +816,8 @@ dac_text16:
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break;
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}
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real_writeb(BIOSMEM_SEG,BIOSMEM_INITIAL_MODE,feature);
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// disabled, has to be set in bios.cpp exclusively
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// real_writeb(BIOSMEM_SEG,BIOSMEM_INITIAL_MODE,feature);
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/* Setup the CPU Window */
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IO_Write(crtc_base,0x6a);
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IO_Write(crtc_base+1,0);
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@ -790,6 +840,3 @@ dac_text16:
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}
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return true;
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}
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@ -23,6 +23,10 @@
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#define ACTL_MAX_REG 0x14
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static INLINE void ResetACTL(void) {
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IO_Read(real_readw(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS) + 6);
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}
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void INT10_SetSinglePaletteRegister(Bit8u reg,Bit8u val) {
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switch (machine) {
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case MCH_TANDY:
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@ -32,7 +36,7 @@ void INT10_SetSinglePaletteRegister(Bit8u reg,Bit8u val) {
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break;
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case MCH_VGA:
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if(reg<=ACTL_MAX_REG) {
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IO_Read(VGAREG_ACTL_RESET);
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ResetACTL();
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IO_Write(VGAREG_ACTL_ADDRESS,reg);
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IO_Write(VGAREG_ACTL_WRITE_DATA,val);
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}
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@ -43,7 +47,7 @@ void INT10_SetSinglePaletteRegister(Bit8u reg,Bit8u val) {
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void INT10_SetOverscanBorderColor(Bit8u val) {
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IO_Read(VGAREG_ACTL_RESET);
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ResetACTL();
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IO_Write(VGAREG_ACTL_ADDRESS,0x11);
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IO_Write(VGAREG_ACTL_WRITE_DATA,val);
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IO_Write(VGAREG_ACTL_ADDRESS,32); //Enable output and protect palette
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@ -64,7 +68,7 @@ void INT10_SetAllPaletteRegisters(PhysPt data) {
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IO_Write(VGAREG_TDY_DATA,mem_readb(data));
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break;
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case MCH_VGA:
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IO_Read(VGAREG_ACTL_RESET);
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ResetACTL();
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// First the colors
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for(Bit8u i=0;i<0x10;i++) {
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IO_Write(VGAREG_ACTL_ADDRESS,i);
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@ -82,14 +86,14 @@ void INT10_SetAllPaletteRegisters(PhysPt data) {
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void INT10_ToggleBlinkingBit(Bit8u state) {
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Bit8u value;
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state&=0x01;
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IO_Read(VGAREG_ACTL_RESET);
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ResetACTL();
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IO_Write(VGAREG_ACTL_ADDRESS,0x10);
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value=IO_Read(VGAREG_ACTL_READ_DATA);
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value&=0xf7;
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value|=state<<3;
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IO_Read(VGAREG_ACTL_RESET);
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ResetACTL();
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IO_Write(VGAREG_ACTL_ADDRESS,0x10);
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IO_Write(VGAREG_ACTL_WRITE_DATA,value);
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IO_Write(VGAREG_ACTL_ADDRESS,32); //Enable output and protect palette
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@ -97,7 +101,7 @@ void INT10_ToggleBlinkingBit(Bit8u state) {
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void INT10_GetSinglePaletteRegister(Bit8u reg,Bit8u * val) {
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if(reg<=ACTL_MAX_REG) {
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IO_Read(VGAREG_ACTL_RESET);
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ResetACTL();
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IO_Write(VGAREG_ACTL_ADDRESS,reg+32);
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*val=IO_Read(VGAREG_ACTL_READ_DATA);
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IO_Write(VGAREG_ACTL_WRITE_DATA,*val);
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@ -105,25 +109,25 @@ void INT10_GetSinglePaletteRegister(Bit8u reg,Bit8u * val) {
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}
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void INT10_GetOverscanBorderColor(Bit8u * val) {
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IO_Read(VGAREG_ACTL_RESET);
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ResetACTL();
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IO_Write(VGAREG_ACTL_ADDRESS,0x11+32);
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*val=IO_Read(VGAREG_ACTL_READ_DATA);
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IO_Write(VGAREG_ACTL_WRITE_DATA,*val);
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||||
}
|
||||
|
||||
void INT10_GetAllPaletteRegisters(PhysPt data) {
|
||||
IO_Read(VGAREG_ACTL_RESET);
|
||||
ResetACTL();
|
||||
// First the colors
|
||||
for(Bit8u i=0;i<0x10;i++) {
|
||||
IO_Write(VGAREG_ACTL_ADDRESS,i);
|
||||
mem_writeb(data,IO_Read(VGAREG_ACTL_READ_DATA));
|
||||
IO_Read(VGAREG_ACTL_RESET);
|
||||
ResetACTL();
|
||||
data++;
|
||||
}
|
||||
// Then the border
|
||||
IO_Write(VGAREG_ACTL_ADDRESS,0x11+32);
|
||||
mem_writeb(data,IO_Read(VGAREG_ACTL_READ_DATA));
|
||||
IO_Read(VGAREG_ACTL_RESET);
|
||||
ResetACTL();
|
||||
}
|
||||
|
||||
void INT10_SetSingleDacRegister(Bit8u index,Bit8u red,Bit8u green,Bit8u blue) {
|
||||
|
|
@ -159,7 +163,7 @@ void INT10_GetDACBlock(Bit16u index,Bit16u count,PhysPt data) {
|
|||
}
|
||||
|
||||
void INT10_SelectDACPage(Bit8u function,Bit8u mode) {
|
||||
IO_Read(VGAREG_ACTL_RESET);
|
||||
ResetACTL();
|
||||
IO_Write(VGAREG_ACTL_ADDRESS,0x10);
|
||||
Bit8u old10=IO_Read(VGAREG_ACTL_READ_DATA);
|
||||
if (!function) { //Select paging mode
|
||||
|
|
@ -178,7 +182,7 @@ void INT10_SelectDACPage(Bit8u function,Bit8u mode) {
|
|||
}
|
||||
|
||||
void INT10_GetDACPage(Bit8u* mode,Bit8u* page) {
|
||||
IO_Read(VGAREG_ACTL_RESET);
|
||||
ResetACTL();
|
||||
IO_Write(VGAREG_ACTL_ADDRESS,0x10);
|
||||
Bit8u reg10=IO_Read(VGAREG_ACTL_READ_DATA);
|
||||
IO_Write(VGAREG_ACTL_WRITE_DATA,reg10);
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: int10_vesa.cpp,v 1.16 2005-04-27 18:58:08 qbix79 Exp $ */
|
||||
/* $Id: int10_vesa.cpp,v 1.17 2005-09-27 11:05:44 c2woody Exp $ */
|
||||
|
||||
#include <string.h>
|
||||
#include <stddef.h>
|
||||
|
|
@ -158,7 +158,7 @@ foundit:
|
|||
|
||||
|
||||
Bit8u VESA_SetSVGAMode(Bit16u mode) {
|
||||
if (INT10_SetVideoMode(mode & 0xfff)) return 0x00;
|
||||
if (INT10_SetVideoMode(mode)) return 0x00;
|
||||
return 0x01;
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue