add variable-size graphics memory, enable some more vga memory wrapping (vasyl)
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3077
This commit is contained in:
Sebastian Strohhäcker
parent
056302a6a5
commit
50917251f4
10 changed files with 285 additions and 76 deletions
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: vga.h,v 1.37 2008-01-09 20:34:21 c2woody Exp $ */
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/* $Id: vga.h,v 1.38 2008-01-12 17:36:48 c2woody Exp $ */
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#ifndef DOSBOX_VGA_H
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#define DOSBOX_VGA_H
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@ -31,9 +31,6 @@
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#define VGA_MEMORY (2*1024*1024)
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#define VGA_CHANGE_SHIFT 9
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//Offset inside VGA_MEMORY that will be used for certain types of caching
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#define VGA_CACHE_OFFSET (512*1024)
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class PageHandler;
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@ -164,6 +161,7 @@ typedef struct {
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Bit8u reg_lock2;
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Bit8u reg_31;
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Bit8u reg_35;
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Bit8u reg_36; // RAM size
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Bit8u reg_3a; // 4/8/doublepixel bit in there
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Bit8u reg_40; // 8415/A functionality register
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Bit8u reg_41; // BIOS flags
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@ -330,11 +328,12 @@ typedef union {
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typedef struct {
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Bit8u* linear;
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Bit8u* linear_orgptr;
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} VGA_Memory;
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typedef struct {
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//Add a few more just to be safe
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Bit8u map[(VGA_MEMORY >> VGA_CHANGE_SHIFT) + 32];
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Bit8u* map; /* allocated dynamically: [(VGA_MEMORY >> VGA_CHANGE_SHIFT) + 32] */
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Bit8u checkMask, frame, writeMask;
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bool active;
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Bit32u clearMask;
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@ -370,6 +369,10 @@ typedef struct {
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VGA_TANDY tandy;
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VGA_OTHER other;
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VGA_Memory mem;
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Bit32u vmemwrap; /* this is assumed to be power of 2 */
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Bit8u* fastmem; /* memory for fast (usually 16-color) rendering, always twice as big as vmemsize */
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Bit8u* fastmem_orgptr;
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Bit32u vmemsize;
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#ifdef VGA_KEEP_CHANGES
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VGA_Changes changes;
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#endif
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@ -394,7 +397,7 @@ void VGA_ATTR_SetPalette(Bit8u index,Bit8u val);
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/* The VGA Subfunction startups */
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void VGA_SetupAttr(void);
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void VGA_SetupMemory(void);
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void VGA_SetupMemory(Section* sec);
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void VGA_SetupDAC(void);
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void VGA_SetupCRTC(void);
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void VGA_SetupMisc(void);
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@ -472,6 +475,9 @@ void SVGA_Setup_TsengET3K(void);
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void SVGA_Setup_ParadisePVGA1A(void);
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void SVGA_Setup_Driver(void);
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// Amount of video memory required for a mode, implemented in int10_modes.cpp
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Bitu VideoModeMemSize(Bitu mode);
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extern Bit32u ExpandTable[256];
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extern Bit32u FillTable[16];
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extern Bit32u CGA_2_Table[16];
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: vga.cpp,v 1.32 2008-01-09 20:34:51 c2woody Exp $ */
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/* $Id: vga.cpp,v 1.33 2008-01-12 17:37:48 c2woody Exp $ */
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#include "dosbox.h"
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//#include "setup.h"
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@ -170,7 +170,7 @@ void VGA_Init(Section* sec) {
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vga.draw.resizing=false;
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vga.mode=M_ERROR; //For first init
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SVGA_Setup_Driver();
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VGA_SetupMemory();
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VGA_SetupMemory(sec);
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VGA_SetupMisc();
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VGA_SetupDAC();
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VGA_SetupGFX();
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@ -249,5 +249,8 @@ void SVGA_Setup_Driver(void) {
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case SVGA_ParadisePVGA1A:
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SVGA_Setup_ParadisePVGA1A();
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break;
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default:
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vga.vmemsize = vga.vmemwrap = 256*1024;
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break;
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}
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}
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: vga_draw.cpp,v 1.91 2008-01-09 20:34:51 c2woody Exp $ */
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/* $Id: vga_draw.cpp,v 1.92 2008-01-12 17:37:48 c2woody Exp $ */
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#include <string.h>
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#include <math.h>
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@ -150,7 +150,10 @@ static Bit8u * VGA_Draw_Changes_Line(Bitu vidstart, Bitu line) {
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Bitu end = ((vidstart + vga.draw.line_length ) >> VGA_CHANGE_SHIFT);
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for (; start <= end;start++) {
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if ( map[start] & checkMask ) {
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Bit8u *ret = &vga.draw.linear_base[ vidstart & vga.draw.linear_mask ];
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Bitu offset = vidstart & vga.draw.linear_mask;
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if(vga.draw.linear_mask-offset < vga.draw.line_length)
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memcpy(vga.draw.linear_base+vga.draw.linear_mask+1, vga.draw.linear_base, vga.draw.line_length);
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Bit8u *ret = &vga.draw.linear_base[ offset ];
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#if !defined(C_UNALIGNED_MEMORY)
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if (GCC_UNLIKELY( ((Bitu)ret) & (sizeof(Bitu)-1)) ) {
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memcpy( TempLine, ret, vga.draw.line_length );
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@ -168,7 +171,12 @@ static Bit8u * VGA_Draw_Changes_Line(Bitu vidstart, Bitu line) {
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#endif
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static Bit8u * VGA_Draw_Linear_Line(Bitu vidstart, Bitu line) {
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Bit8u *ret = &vga.draw.linear_base[ vidstart & vga.draw.linear_mask ];
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// There is guaranteed extra memory past the wrap boundary. So, instead of using temporary
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// storage just copy appropriate chunk from the beginning to the wrap boundary when needed.
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Bitu offset = vidstart & vga.draw.linear_mask;
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if (vga.draw.linear_mask-offset < vga.draw.line_length)
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memcpy(vga.draw.linear_base+vga.draw.linear_mask+1, vga.draw.linear_base, vga.draw.line_length);
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Bit8u *ret = &vga.draw.linear_base[ offset ];
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#if !defined(C_UNALIGNED_MEMORY)
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if (GCC_UNLIKELY( ((Bitu)ret) & (sizeof(Bitu)-1)) ) {
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memcpy( TempLine, ret, vga.draw.line_length );
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@ -598,7 +606,7 @@ skip_cursor:
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static void VGA_VerticalDisplayEnd(Bitu val) {
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// vga.config.retrace=true;
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vga.config.real_start=vga.config.display_start & ((VGA_MEMORY)-1);
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vga.config.real_start=vga.config.display_start & (vga.vmemwrap-1);
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}
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static void VGA_HorizontalTimer(void) {
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@ -800,11 +808,11 @@ static void VGA_VerticalTimer(Bitu val) {
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break;
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case M_VGA:
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if(vga.config.compatible_chain4 && (vga.crtc.underline_location & 0x40)) {
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vga.draw.linear_base = vga.mem.linear + VGA_CACHE_OFFSET;
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vga.draw.linear_base = vga.fastmem;
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vga.draw.linear_mask = 0xffff;
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} else {
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vga.draw.linear_base = vga.mem.linear;
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vga.draw.linear_mask = VGA_MEMORY - 1;
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vga.draw.linear_mask = vga.vmemwrap - 1;
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}
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case M_LIN8:
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case M_LIN15:
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@ -1148,7 +1156,7 @@ void VGA_SetupDrawing(Bitu val) {
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break;
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}
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vga.draw.linear_base = vga.mem.linear;
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vga.draw.linear_mask = VGA_MEMORY - 1;
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vga.draw.linear_mask = vga.vmemwrap - 1;
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switch (vga.mode) {
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case M_VGA:
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doublewidth=true;
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@ -1187,8 +1195,8 @@ void VGA_SetupDrawing(Bitu val) {
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vga.draw.blocks = width;
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width<<=3;
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VGA_DrawLine=VGA_Draw_Linear_Line;
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vga.draw.linear_base = vga.mem.linear + VGA_CACHE_OFFSET;
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vga.draw.linear_mask = 1024 * 1024 - 1;
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vga.draw.linear_base = vga.fastmem;
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vga.draw.linear_mask = (vga.vmemwrap<<1) - 1;
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break;
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case M_EGA:
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doublewidth=(vga.seq.clocking_mode & 0x8) > 0;
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@ -1199,8 +1207,8 @@ void VGA_SetupDrawing(Bitu val) {
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VGA_DrawLine = VGA_Draw_Xlat16_Linear_Line;
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} else VGA_DrawLine=VGA_Draw_Linear_Line;
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vga.draw.linear_base = vga.mem.linear + VGA_CACHE_OFFSET;
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vga.draw.linear_mask = 512 * 1024 - 1;
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vga.draw.linear_base = vga.fastmem;
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vga.draw.linear_mask = (vga.vmemwrap<<1) - 1;
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break;
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case M_CGA16:
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doubleheight=true;
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: vga_memory.cpp,v 1.46 2008-01-09 20:34:51 c2woody Exp $ */
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/* $Id: vga_memory.cpp,v 1.47 2008-01-12 17:37:48 c2woody Exp $ */
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#include <stdlib.h>
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#include <string.h>
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@ -26,6 +26,27 @@
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#include "paging.h"
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#include "pic.h"
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#include "inout.h"
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#include "setup.h"
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/* #ifndef C_VGARAM_CHECKED
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#define C_VGARAM_CHECKED 1
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#endif */
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#if C_VGARAM_CHECKED
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// Checked linear offset
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#define CHECKED(v) ((v)&(vga.vmemwrap-1))
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// Checked planar offset (latched access)
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#define CHECKED2(v) ((v)&((vga.vmemwrap>>2)-1))
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// Checked planar offset (latched access)
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#else
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#define CHECKED(v) (v)
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#define CHECKED2(v) (v)
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#endif
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#define CHECKED3(v) ((v)&(vga.vmemwrap-1))
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#define CHECKED4(v) ((v)&((vga.vmemwrap>>2)-1))
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#ifdef VGA_KEEP_CHANGES
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#define MEM_CHANGED( _MEM ) vga.changes.map[ (_MEM) >> VGA_CHANGE_SHIFT ] |= vga.changes.writeMask;
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@ -133,11 +154,13 @@ public:
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Bitu readb(PhysPt addr) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_read_full;
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addr = CHECKED2(addr);
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return readHandler(addr);
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}
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Bitu readw(PhysPt addr) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_read_full;
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addr = CHECKED2(addr);
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return
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(readHandler(addr+0) << 0) |
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(readHandler(addr+1) << 8);
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Bitu readd(PhysPt addr) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_read_full;
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addr = CHECKED2(addr);
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return
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(readHandler(addr+0) << 0) |
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(readHandler(addr+1) << 8) |
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@ -166,7 +190,7 @@ public:
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start >>= 2;
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pixels.d=((Bit32u*)vga.mem.linear)[start];
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Bit8u * write_pixels=&vga.mem.linear[VGA_CACHE_OFFSET+(start<<3)];
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Bit8u * write_pixels=&vga.fastmem[start<<3];
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Bit32u colors0_3, colors4_7;
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VGA_Latch temp;temp.d=(pixels.d>>4) & 0x0f0f0f0f;
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@ -191,12 +215,14 @@ public:
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void writeb(PhysPt addr,Bitu val) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_write_full;
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addr = CHECKED(addr);
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MEM_CHANGED( addr << 3);
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writeHandler(addr+0,(Bit8u)(val >> 0));
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}
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void writew(PhysPt addr,Bitu val) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_write_full;
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addr = CHECKED(addr);
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MEM_CHANGED( addr << 3);
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writeHandler(addr+0,(Bit8u)(val >> 0));
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writeHandler(addr+1,(Bit8u)(val >> 8));
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@ -204,6 +230,7 @@ public:
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void writed(PhysPt addr,Bitu val) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_write_full;
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addr = CHECKED(addr);
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MEM_CHANGED( addr << 3);
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writeHandler(addr+0,(Bit8u)(val >> 0));
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writeHandler(addr+1,(Bit8u)(val >> 8));
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@ -213,11 +240,13 @@ public:
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Bitu readb(PhysPt addr) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_read_full;
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addr = CHECKED(addr);
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return readHandler(addr);
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}
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Bitu readw(PhysPt addr) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_read_full;
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addr = CHECKED(addr);
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return
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(readHandler(addr+0) << 0) |
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(readHandler(addr+1) << 8);
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@ -225,6 +254,7 @@ public:
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Bitu readd(PhysPt addr) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_read_full;
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addr = CHECKED(addr);
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return
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(readHandler(addr+0) << 0) |
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(readHandler(addr+1) << 8) |
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@ -244,7 +274,7 @@ public:
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pixels.d&=vga.config.full_not_map_mask;
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pixels.d|=(data & vga.config.full_map_mask);
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((Bit32u*)vga.mem.linear)[start]=pixels.d;
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Bit8u * write_pixels=&vga.mem.linear[VGA_CACHE_OFFSET+(start<<3)];
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Bit8u * write_pixels=&vga.fastmem[start<<3];
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Bit32u colors0_3, colors4_7;
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VGA_Latch temp;temp.d=(pixels.d>>4) & 0x0f0f0f0f;
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@ -261,10 +291,6 @@ public:
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Expand16Table[2][temp.b[2]] |
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Expand16Table[3][temp.b[3]];
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*(Bit32u *)(write_pixels+4)=colors4_7;
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if (wrapping && GCC_UNLIKELY( start < 512)) {
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*(Bit32u *)(write_pixels+512*1024)=colors0_3;
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*(Bit32u *)(write_pixels+512*1024+4)=colors4_7;
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}
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}
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public:
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VGA_UnchainedEGA_Handler() {
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@ -273,12 +299,14 @@ public:
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void writeb(PhysPt addr,Bitu val) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_write_full;
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addr = CHECKED2(addr);
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MEM_CHANGED( addr << 3);
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writeHandler<true>(addr+0,(Bit8u)(val >> 0));
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}
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void writew(PhysPt addr,Bitu val) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_write_full;
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addr = CHECKED2(addr);
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MEM_CHANGED( addr << 3);
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writeHandler<true>(addr+0,(Bit8u)(val >> 0));
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writeHandler<true>(addr+1,(Bit8u)(val >> 8));
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@ -286,6 +314,7 @@ public:
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void writed(PhysPt addr,Bitu val) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_write_full;
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addr = CHECKED2(addr);
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MEM_CHANGED( addr << 3);
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writeHandler<true>(addr+0,(Bit8u)(val >> 0));
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writeHandler<true>(addr+1,(Bit8u)(val >> 8));
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@ -306,10 +335,10 @@ public:
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}
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template <class Size>
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static INLINE void writeCache(PhysPt addr, Bitu val) {
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hostWrite<Size>( &vga.mem.linear[VGA_CACHE_OFFSET+addr], val );
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hostWrite<Size>( &vga.fastmem[addr], val );
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if (GCC_UNLIKELY(addr < 320)) {
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// And replicate the first line
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hostWrite<Size>( &vga.mem.linear[VGA_CACHE_OFFSET+addr+64*1024], val );
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hostWrite<Size>( &vga.fastmem[addr+64*1024], val );
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}
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}
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template <class Size>
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@ -320,11 +349,13 @@ public:
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Bitu readb(PhysPt addr ) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_read_full;
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addr = CHECKED(addr);
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return readHandler<Bit8u>( addr );
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}
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Bitu readw(PhysPt addr ) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_read_full;
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addr = CHECKED(addr);
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if (GCC_UNLIKELY(addr & 1))
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return
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(readHandler<Bit8u>( addr+0 ) << 0 ) |
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@ -335,6 +366,7 @@ public:
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Bitu readd(PhysPt addr ) {
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addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
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addr += vga.svga.bank_read_full;
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addr = CHECKED(addr);
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if (GCC_UNLIKELY(addr & 3))
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return
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(readHandler<Bit8u>( addr+0 ) << 0 ) |
|
||||
|
|
@ -347,6 +379,7 @@ public:
|
|||
void writeb(PhysPt addr, Bitu val ) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
addr += vga.svga.bank_write_full;
|
||||
addr = CHECKED(addr);
|
||||
MEM_CHANGED( addr );
|
||||
writeHandler<Bit8u>( addr, val );
|
||||
writeCache<Bit8u>( addr, val );
|
||||
|
|
@ -354,6 +387,7 @@ public:
|
|||
void writew(PhysPt addr,Bitu val) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
addr += vga.svga.bank_write_full;
|
||||
addr = CHECKED(addr);
|
||||
MEM_CHANGED( addr );
|
||||
// MEM_CHANGED( addr + 1);
|
||||
if (GCC_UNLIKELY(addr & 1)) {
|
||||
|
|
@ -367,6 +401,7 @@ public:
|
|||
void writed(PhysPt addr,Bitu val) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
addr += vga.svga.bank_write_full;
|
||||
addr = CHECKED(addr);
|
||||
MEM_CHANGED( addr );
|
||||
// MEM_CHANGED( addr + 3);
|
||||
if (GCC_UNLIKELY(addr & 3)) {
|
||||
|
|
@ -391,7 +426,7 @@ public:
|
|||
pixels.d|=(data & vga.config.full_map_mask);
|
||||
((Bit32u*)vga.mem.linear)[addr]=pixels.d;
|
||||
if(vga.config.compatible_chain4)
|
||||
((Bit32u*)vga.mem.linear)[addr+64*1024]=pixels.d;
|
||||
((Bit32u*)vga.mem.linear)[CHECKED2(addr+64*1024)]=pixels.d;
|
||||
}
|
||||
public:
|
||||
VGA_UnchainedVGA_Handler() {
|
||||
|
|
@ -400,12 +435,14 @@ public:
|
|||
void writeb(PhysPt addr,Bitu val) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
addr += vga.svga.bank_write_full;
|
||||
addr = CHECKED2(addr);
|
||||
MEM_CHANGED( addr << 2 );
|
||||
writeHandler(addr+0,(Bit8u)(val >> 0));
|
||||
}
|
||||
void writew(PhysPt addr,Bitu val) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
addr += vga.svga.bank_write_full;
|
||||
addr = CHECKED2(addr);
|
||||
MEM_CHANGED( addr << 2);
|
||||
writeHandler(addr+0,(Bit8u)(val >> 0));
|
||||
writeHandler(addr+1,(Bit8u)(val >> 8));
|
||||
|
|
@ -413,6 +450,7 @@ public:
|
|||
void writed(PhysPt addr,Bitu val) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
addr += vga.svga.bank_write_full;
|
||||
addr = CHECKED2(addr);
|
||||
MEM_CHANGED( addr << 2);
|
||||
writeHandler(addr+0,(Bit8u)(val >> 0));
|
||||
writeHandler(addr+1,(Bit8u)(val >> 8));
|
||||
|
|
@ -445,11 +483,11 @@ public:
|
|||
}
|
||||
HostPt GetHostReadPt(Bitu phys_page) {
|
||||
phys_page-=vgapages.base;
|
||||
return &vga.mem.linear[vga.svga.bank_read_full+phys_page*4096];
|
||||
return &vga.mem.linear[CHECKED3(vga.svga.bank_read_full+phys_page*4096)];
|
||||
}
|
||||
HostPt GetHostWritePt(Bitu phys_page) {
|
||||
phys_page-=vgapages.base;
|
||||
return &vga.mem.linear[vga.svga.bank_write_full+phys_page*4096];
|
||||
return &vga.mem.linear[CHECKED3(vga.svga.bank_write_full+phys_page*4096)];
|
||||
}
|
||||
};
|
||||
|
||||
|
|
@ -461,33 +499,39 @@ public:
|
|||
Bitu readb(PhysPt addr) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
addr += vga.svga.bank_read_full;
|
||||
addr = CHECKED(addr);
|
||||
return hostRead<Bit8u>( &vga.mem.linear[addr] );
|
||||
}
|
||||
Bitu readw(PhysPt addr) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
addr += vga.svga.bank_read_full;
|
||||
addr = CHECKED(addr);
|
||||
return hostRead<Bit16u>( &vga.mem.linear[addr] );
|
||||
}
|
||||
Bitu readd(PhysPt addr) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
addr += vga.svga.bank_read_full;
|
||||
addr = CHECKED(addr);
|
||||
return hostRead<Bit32u>( &vga.mem.linear[addr] );
|
||||
}
|
||||
void writeb(PhysPt addr,Bitu val) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
addr += vga.svga.bank_write_full;
|
||||
addr = CHECKED(addr);
|
||||
MEM_CHANGED( addr );
|
||||
hostWrite<Bit8u>( &vga.mem.linear[addr], val );
|
||||
}
|
||||
void writew(PhysPt addr,Bitu val) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
addr += vga.svga.bank_write_full;
|
||||
addr = CHECKED(addr);
|
||||
MEM_CHANGED( addr );
|
||||
hostWrite<Bit16u>( &vga.mem.linear[addr], val );
|
||||
}
|
||||
void writed(PhysPt addr,Bitu val) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) & 0xffff;
|
||||
addr += vga.svga.bank_write_full;
|
||||
addr = CHECKED(addr);
|
||||
MEM_CHANGED( addr );
|
||||
hostWrite<Bit32u>( &vga.mem.linear[addr], val );
|
||||
}
|
||||
|
|
@ -500,20 +544,20 @@ public:
|
|||
}
|
||||
void writeb(PhysPt addr,Bitu val) {
|
||||
addr = vga.svga.bank_write_full + (PAGING_GetPhysicalAddress(addr) & 0xffff);
|
||||
addr &= (128*1024-1);
|
||||
addr = CHECKED4(addr);
|
||||
MEM_CHANGED( addr << 3 );
|
||||
writeHandler<false>(addr+0,(Bit8u)(val >> 0));
|
||||
}
|
||||
void writew(PhysPt addr,Bitu val) {
|
||||
addr = vga.svga.bank_write_full + (PAGING_GetPhysicalAddress(addr) & 0xffff);
|
||||
addr &= (128*1024-1);
|
||||
addr = CHECKED4(addr);
|
||||
MEM_CHANGED( addr << 3 );
|
||||
writeHandler<false>(addr+0,(Bit8u)(val >> 0));
|
||||
writeHandler<false>(addr+1,(Bit8u)(val >> 8));
|
||||
}
|
||||
void writed(PhysPt addr,Bitu val) {
|
||||
addr = vga.svga.bank_write_full + (PAGING_GetPhysicalAddress(addr) & 0xffff);
|
||||
addr &= (128*1024-1);
|
||||
addr = CHECKED4(addr);
|
||||
MEM_CHANGED( addr << 3 );
|
||||
writeHandler<false>(addr+0,(Bit8u)(val >> 0));
|
||||
writeHandler<false>(addr+1,(Bit8u)(val >> 8));
|
||||
|
|
@ -522,19 +566,19 @@ public:
|
|||
}
|
||||
Bitu readb(PhysPt addr) {
|
||||
addr = vga.svga.bank_read_full + (PAGING_GetPhysicalAddress(addr) & 0xffff);
|
||||
addr &= (128*1024-1);
|
||||
addr = CHECKED4(addr);
|
||||
return readHandler(addr);
|
||||
}
|
||||
Bitu readw(PhysPt addr) {
|
||||
addr = vga.svga.bank_read_full + (PAGING_GetPhysicalAddress(addr) & 0xffff);
|
||||
addr &= (128*1024-1);
|
||||
addr = CHECKED4(addr);
|
||||
return
|
||||
(readHandler(addr+0) << 0) |
|
||||
(readHandler(addr+1) << 8);
|
||||
}
|
||||
Bitu readd(PhysPt addr) {
|
||||
addr = vga.svga.bank_read_full + (PAGING_GetPhysicalAddress(addr) & 0xffff);
|
||||
addr &= (128*1024-1);
|
||||
addr = CHECKED4(addr);
|
||||
return
|
||||
(readHandler(addr+0) << 0) |
|
||||
(readHandler(addr+1) << 8) |
|
||||
|
|
@ -551,28 +595,34 @@ public:
|
|||
}
|
||||
Bitu readb(PhysPt addr) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) - vga.lfb.addr;
|
||||
addr = CHECKED(addr);
|
||||
return hostRead<Bit8u>( &vga.mem.linear[addr] );
|
||||
}
|
||||
Bitu readw(PhysPt addr) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) - vga.lfb.addr;
|
||||
addr = CHECKED(addr);
|
||||
return hostRead<Bit16u>( &vga.mem.linear[addr] );
|
||||
}
|
||||
Bitu readd(PhysPt addr) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) - vga.lfb.addr;
|
||||
addr = CHECKED(addr);
|
||||
return hostRead<Bit32u>( &vga.mem.linear[addr] );
|
||||
}
|
||||
void writeb(PhysPt addr,Bitu val) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) - vga.lfb.addr;
|
||||
addr = CHECKED(addr);
|
||||
hostWrite<Bit8u>( &vga.mem.linear[addr], val );
|
||||
MEM_CHANGED( addr );
|
||||
}
|
||||
void writew(PhysPt addr,Bitu val) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) - vga.lfb.addr;
|
||||
addr = CHECKED(addr);
|
||||
hostWrite<Bit16u>( &vga.mem.linear[addr], val );
|
||||
MEM_CHANGED( addr );
|
||||
}
|
||||
void writed(PhysPt addr,Bitu val) {
|
||||
addr = PAGING_GetPhysicalAddress(addr) - vga.lfb.addr;
|
||||
addr = CHECKED(addr);
|
||||
hostWrite<Bit32u>( &vga.mem.linear[addr], val );
|
||||
MEM_CHANGED( addr );
|
||||
}
|
||||
|
|
@ -585,7 +635,7 @@ public:
|
|||
}
|
||||
HostPt GetHostReadPt( Bitu phys_page ) {
|
||||
phys_page -= vga.lfb.page;
|
||||
return &vga.mem.linear[phys_page * 4096];
|
||||
return &vga.mem.linear[CHECKED3(phys_page * 4096)];
|
||||
}
|
||||
HostPt GetHostWritePt( Bitu phys_page ) {
|
||||
return GetHostReadPt( phys_page );
|
||||
|
|
@ -838,21 +888,45 @@ void VGA_StartUpdateLFB(void) {
|
|||
#else
|
||||
vga.lfb.handler = &vgaph.lfbchanges;
|
||||
#endif
|
||||
MEM_SetLFB(vga.s3.la_window << 4 ,VGA_MEMORY/4096, vga.lfb.handler, &vgaph.mmio);
|
||||
MEM_SetLFB(vga.s3.la_window << 4 ,vga.vmemsize/4096, vga.lfb.handler, &vgaph.mmio);
|
||||
}
|
||||
|
||||
void VGA_SetupMemory() {
|
||||
// allocate 16byte-aligned memory
|
||||
vga.mem.linear = new Bit8u[VGA_MEMORY+16];
|
||||
vga.mem.linear=(Bit8u*)(((Bitu)vga.mem.linear + 16-1) & ~(16-1));
|
||||
memset( vga.mem.linear, 0, VGA_MEMORY );
|
||||
static void VGA_Memory_ShutDown(Section * sec) {
|
||||
delete[] vga.mem.linear_orgptr;
|
||||
delete[] vga.fastmem_orgptr;
|
||||
#ifdef VGA_KEEP_CHANGES
|
||||
delete[] vga.changes.map;
|
||||
#endif
|
||||
}
|
||||
|
||||
void VGA_SetupMemory(Section* sec) {
|
||||
vga.svga.bank_read = vga.svga.bank_write = 0;
|
||||
vga.svga.bank_read_full = vga.svga.bank_write_full = 0;
|
||||
|
||||
// We reserve extra 2K for one scan line
|
||||
vga.mem.linear_orgptr = new Bit8u[vga.vmemsize+2048+16];
|
||||
vga.mem.linear=(Bit8u*)(((Bitu)vga.mem.linear_orgptr + 16-1) & ~(16-1));
|
||||
memset(vga.mem.linear,0,vga.vmemsize);
|
||||
|
||||
vga.fastmem_orgptr = new Bit8u[(vga.vmemsize<<1)+4096+16];
|
||||
vga.fastmem=(Bit8u*)(((Bitu)vga.fastmem_orgptr + 16-1) & ~(16-1));
|
||||
|
||||
// In most cases these values stay the same. Assumptions: vmemwrap is power of 2,
|
||||
// vmemwrap <= vmemsize, fastmem implicitly has mem wrap twice as big
|
||||
vga.vmemwrap = vga.vmemsize;
|
||||
|
||||
#ifdef VGA_KEEP_CHANGES
|
||||
memset( &vga.changes, 0, sizeof( vga.changes ));
|
||||
int changesMapSize = (vga.vmemsize >> VGA_CHANGE_SHIFT) + 32;
|
||||
vga.changes.map = new Bit8u[changesMapSize];
|
||||
memset(vga.changes.map, 0, changesMapSize);
|
||||
#endif
|
||||
vga.svga.bank_read = vga.svga.bank_write = 0;
|
||||
vga.svga.bank_read_full = vga.svga.bank_write_full = 0;
|
||||
vga.svga.bank_size = 0x10000; /* most common bank size is 64K */
|
||||
|
||||
sec->AddDestroyFunction(&VGA_Memory_ShutDown);
|
||||
|
||||
if (machine==MCH_PCJR) {
|
||||
/* PCJr does not have dedicated graphics memory but uses
|
||||
conventional memory below 128k */
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: vga_paradise.cpp,v 1.1 2008-01-09 20:34:51 c2woody Exp $ */
|
||||
/* $Id: vga_paradise.cpp,v 1.2 2008-01-12 17:37:48 c2woody Exp $ */
|
||||
|
||||
#include "dosbox.h"
|
||||
#include "setup.h"
|
||||
|
|
@ -162,10 +162,13 @@ void FinishSetMode_PVGA1A(Bitu /*crtc_base*/, VGA_ModeExtraData* modeData) {
|
|||
if (svga.determine_mode)
|
||||
svga.determine_mode();
|
||||
|
||||
if (vga.mode != M_VGA)
|
||||
vga.config.compatible_chain4 = false; // in process of verification
|
||||
else
|
||||
if(vga.mode != M_VGA) {
|
||||
vga.config.compatible_chain4 = false;
|
||||
vga.vmemwrap = vga.vmemsize;
|
||||
} else {
|
||||
vga.config.compatible_chain4 = true;
|
||||
vga.vmemwrap = 256*1024;
|
||||
}
|
||||
|
||||
VGA_SetupHandlers();
|
||||
}
|
||||
|
|
@ -195,6 +198,10 @@ Bitu GetClock_PVGA1A() {
|
|||
return pvga1a.clockFreq[(vga.misc_output >> 2) & 3];
|
||||
}
|
||||
|
||||
bool AcceptsMode_PVGA1A(Bitu mode) {
|
||||
return VideoModeMemSize(mode) < vga.vmemsize;
|
||||
}
|
||||
|
||||
void SVGA_Setup_ParadisePVGA1A(void) {
|
||||
svga.write_p3cf = &write_p3cf_pvga1a;
|
||||
svga.read_p3cf = &read_p3cf_pvga1a;
|
||||
|
|
@ -203,14 +210,26 @@ void SVGA_Setup_ParadisePVGA1A(void) {
|
|||
svga.determine_mode = &DetermineMode_PVGA1A;
|
||||
svga.set_clock = &SetClock_PVGA1A;
|
||||
svga.get_clock = &GetClock_PVGA1A;
|
||||
svga.accepts_mode = &AcceptsMode_PVGA1A;
|
||||
|
||||
VGA_SetClock(0,CLK_25);
|
||||
VGA_SetClock(1,CLK_28);
|
||||
VGA_SetClock(2,32400); // could not find documentation
|
||||
VGA_SetClock(3,35900);
|
||||
|
||||
// Set memory size at 512K (standard for PVGA1A)
|
||||
pvga1a.PR1 = 2<<6;
|
||||
// Adjust memory, default to 512K
|
||||
if (vga.vmemsize == 0)
|
||||
vga.vmemsize = 512*1024;
|
||||
|
||||
if (vga.vmemsize < 512*1024) {
|
||||
vga.vmemsize = 256*1024;
|
||||
pvga1a.PR1 = 1<<6;
|
||||
} else if (vga.vmemsize > 512*1024) {
|
||||
vga.vmemsize = 1024*1024;
|
||||
pvga1a.PR1 = 3<<6;
|
||||
} else {
|
||||
pvga1a.PR1 = 2<<6;
|
||||
}
|
||||
|
||||
// Paradise ROM signature
|
||||
PhysPt rom_base=PhysMake(0xc000,0);
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: vga_s3.cpp,v 1.11 2008-01-09 20:34:51 c2woody Exp $ */
|
||||
/* $Id: vga_s3.cpp,v 1.12 2008-01-12 17:37:48 c2woody Exp $ */
|
||||
|
||||
#include "dosbox.h"
|
||||
#include "inout.h"
|
||||
|
|
@ -28,6 +28,8 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
|
|||
//TODO Base address
|
||||
vga.s3.reg_31 = val;
|
||||
vga.config.compatible_chain4 = !(val&0x08);
|
||||
if (vga.config.compatible_chain4) vga.vmemwrap = 256*1024;
|
||||
else vga.vmemwrap = vga.vmemsize;
|
||||
vga.config.display_start = (vga.config.display_start&~0x30000)|((val&0x30)<<12);
|
||||
VGA_DetermineMode();
|
||||
VGA_SetupHandlers();
|
||||
|
|
@ -312,7 +314,7 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
|
|||
}
|
||||
break;
|
||||
case 0x6a: /* Extended System Control 4 */
|
||||
vga.svga.bank_read=val & 0x3f;
|
||||
vga.svga.bank_read=val & 0x7f;
|
||||
vga.svga.bank_write = vga.svga.bank_read;
|
||||
VGA_SetupHandlers();
|
||||
break;
|
||||
|
|
@ -345,8 +347,7 @@ Bitu SVGA_S3_ReadCRTC( Bitu reg, Bitu iolen) {
|
|||
case 0x35: /* CR35 CRT Register Lock */
|
||||
return vga.s3.reg_35|(vga.svga.bank_read & 0xf);
|
||||
case 0x36: /* CR36 Reset State Read 1 */
|
||||
return 0x92; /* PCI version */
|
||||
//2 Mb PCI and some bios settings
|
||||
return vga.s3.reg_36;
|
||||
case 0x37: /* Reset state read 2 */
|
||||
return 0x2b;
|
||||
case 0x38: /* CR38 Register Lock 1 */
|
||||
|
|
@ -403,7 +404,7 @@ Bitu SVGA_S3_ReadCRTC( Bitu reg, Bitu iolen) {
|
|||
case 0x69: /* Extended System Control 3 */
|
||||
return (Bit8u)((vga.config.display_start & 0x1f0000)>>16);
|
||||
case 0x6a: /* Extended System Control 4 */
|
||||
return (Bit8u)(vga.svga.bank_read & 0x3f);
|
||||
return (Bit8u)(vga.svga.bank_read & 0x7f);
|
||||
case 0x6b: // BIOS scatchpad: LFB address
|
||||
return vga.s3.reg_6b;
|
||||
default:
|
||||
|
|
@ -483,6 +484,10 @@ bool SVGA_S3_HWCursorActive(void) {
|
|||
return (vga.s3.hgc.curmode & 0x1) != 0;
|
||||
}
|
||||
|
||||
bool SVGA_S3_AcceptsMode(Bitu mode) {
|
||||
return VideoModeMemSize(mode) < vga.vmemsize;
|
||||
}
|
||||
|
||||
void SVGA_Setup_S3Trio(void) {
|
||||
svga.write_p3d5 = &SVGA_S3_WriteCRTC;
|
||||
svga.read_p3d5 = &SVGA_S3_ReadCRTC;
|
||||
|
|
@ -496,5 +501,26 @@ void SVGA_Setup_S3Trio(void) {
|
|||
svga.set_clock = 0; /* implemented in core */
|
||||
svga.get_clock = &SVGA_S3_GetClock;
|
||||
svga.hardware_cursor_active = &SVGA_S3_HWCursorActive;
|
||||
svga.accepts_mode = 0; /* don't filter modes */
|
||||
svga.accepts_mode = &SVGA_S3_AcceptsMode;
|
||||
|
||||
if (vga.vmemsize == 0)
|
||||
vga.vmemsize = VGA_MEMORY; // the most common S3 configuration
|
||||
|
||||
// Set CRTC 36 to specify amount of VRAM and PCI
|
||||
if (vga.vmemsize < 1024*1024) {
|
||||
vga.vmemsize = 512*1024;
|
||||
vga.s3.reg_36 = 0xf2;
|
||||
} else if (vga.vmemsize < 2048*1024) {
|
||||
vga.vmemsize = 1024*1024;
|
||||
vga.s3.reg_36 = 0xd2;
|
||||
} else if (vga.vmemsize < 3072*1024) {
|
||||
vga.vmemsize = 2048*1024;
|
||||
vga.s3.reg_36 = 0x92;
|
||||
} else if (vga.vmemsize < 4096*1024) {
|
||||
vga.vmemsize = 3072*1024;
|
||||
vga.s3.reg_36 = 0x52;
|
||||
} else { // Trio64 supported only up to 4M
|
||||
vga.vmemsize = 4096*1024;
|
||||
vga.s3.reg_36 = 0x12;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: vga_tseng.cpp,v 1.1 2008-01-09 20:34:51 c2woody Exp $ */
|
||||
/* $Id: vga_tseng.cpp,v 1.2 2008-01-12 17:37:48 c2woody Exp $ */
|
||||
|
||||
#include "dosbox.h"
|
||||
#include "setup.h"
|
||||
|
|
@ -147,6 +147,7 @@ void write_p3d5_et4k(Bitu reg,Bitu val,Bitu iolen) {
|
|||
case 0x37:
|
||||
if (val != et4k.store_3d4_37) {
|
||||
et4k.store_3d4_37 = val;
|
||||
vga.vmemwrap = ((64*1024)<<((val&8)>>2))<<((val&3)-1);
|
||||
VGA_SetupHandlers();
|
||||
}
|
||||
break;
|
||||
|
|
@ -340,7 +341,7 @@ void FinishSetMode_ET4K(Bitu crtc_base, VGA_ModeExtraData* modeData) {
|
|||
IO_Write(crtc_base,0x33);IO_Write(crtc_base+1,0);
|
||||
IO_Write(crtc_base,0x34);IO_Write(crtc_base+1,0);
|
||||
IO_Write(crtc_base,0x36);IO_Write(crtc_base+1,0);
|
||||
IO_Write(crtc_base,0x37);IO_Write(crtc_base+1,0x0f); // 1M video ram (0x0e for 512K, 0x0d for 256K)
|
||||
IO_Write(crtc_base,0x37);IO_Write(crtc_base+1,0x0c|(vga.vmemsize==1024*1024?3:vga.vmemsize==512*1024?2:1));
|
||||
// Clear ext SEQ
|
||||
IO_Write(0x3c4,0x06);IO_Write(0x3c5,0);
|
||||
IO_Write(0x3c4,0x07);IO_Write(0x3c5,0);
|
||||
|
|
@ -368,6 +369,7 @@ void FinishSetMode_ET4K(Bitu crtc_base, VGA_ModeExtraData* modeData) {
|
|||
// Verified (on real hardware and in a few games): Tseng ET4000 used chain4 implementation
|
||||
// different from standard VGA. It was also not limited to 64K in regular mode 13h.
|
||||
vga.config.compatible_chain4 = false;
|
||||
vga.vmemwrap = vga.vmemsize;
|
||||
|
||||
VGA_SetupHandlers();
|
||||
}
|
||||
|
|
@ -396,7 +398,8 @@ Bitu GetClock_ET4K() {
|
|||
}
|
||||
|
||||
bool AcceptsMode_ET4K(Bitu mode) {
|
||||
return mode != 0x3d;
|
||||
return VideoModeMemSize(mode) < vga.vmemsize;
|
||||
// return mode != 0x3d;
|
||||
}
|
||||
|
||||
void SVGA_Setup_TsengET4K(void) {
|
||||
|
|
@ -434,6 +437,17 @@ void SVGA_Setup_TsengET4K(void) {
|
|||
IO_RegisterReadHandler(0x3cd,read_p3cd_et4k,IO_MB);
|
||||
IO_RegisterWriteHandler(0x3cd,write_p3cd_et4k,IO_MB);
|
||||
|
||||
// Default to 1M of VRAM
|
||||
if (vga.vmemsize == 0)
|
||||
vga.vmemsize = 1024*1024;
|
||||
|
||||
if (vga.vmemsize < 512*1024)
|
||||
vga.vmemsize = 256*1024;
|
||||
else if (vga.vmemsize < 1024*1024)
|
||||
vga.vmemsize = 512*1024;
|
||||
else
|
||||
vga.vmemsize = 1024*1024;
|
||||
|
||||
// Tseng ROM signature
|
||||
PhysPt rom_base=PhysMake(0xc000,0);
|
||||
phys_writeb(rom_base+0x0075,' ');
|
||||
|
|
@ -716,6 +730,7 @@ void FinishSetMode_ET3K(Bitu crtc_base, VGA_ModeExtraData* modeData) {
|
|||
// Verified on functioning (at last!) hardware: Tseng ET3000 is the same as ET4000 when
|
||||
// it comes to chain4 architecture
|
||||
vga.config.compatible_chain4 = false;
|
||||
vga.vmemwrap = vga.vmemsize;
|
||||
|
||||
VGA_SetupHandlers();
|
||||
}
|
||||
|
|
@ -744,7 +759,7 @@ Bitu GetClock_ET3K() {
|
|||
}
|
||||
|
||||
bool AcceptsMode_ET3K(Bitu mode) {
|
||||
return mode <= 0x37 && mode != 0x2f;
|
||||
return mode <= 0x37 && mode != 0x2f && VideoModeMemSize(mode) < vga.vmemsize;
|
||||
}
|
||||
|
||||
void SVGA_Setup_TsengET3K(void) {
|
||||
|
|
@ -773,6 +788,8 @@ void SVGA_Setup_TsengET3K(void) {
|
|||
IO_RegisterReadHandler(0x3cd,read_p3cd_et3k,IO_MB);
|
||||
IO_RegisterWriteHandler(0x3cd,write_p3cd_et3k,IO_MB);
|
||||
|
||||
vga.vmemsize = 512*1024; // Cannot figure how this was supposed to work on the real card
|
||||
|
||||
// Tseng ROM signature
|
||||
PhysPt rom_base=PhysMake(0xc000,0);
|
||||
phys_writeb(rom_base+0x0075,' ');
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: vga_xga.cpp,v 1.11 2008-01-10 20:36:03 c2woody Exp $ */
|
||||
/* $Id: vga_xga.cpp,v 1.12 2008-01-12 17:37:48 c2woody Exp $ */
|
||||
|
||||
#include <string.h>
|
||||
#include "dosbox.h"
|
||||
|
|
@ -152,7 +152,7 @@ void XGA_DrawPoint(Bitu x, Bitu y, Bitu c) {
|
|||
Bitu XGA_GetPoint(Bitu x, Bitu y) {
|
||||
Bit32u memaddr = (y * XGA_SCREEN_WIDTH) + x;
|
||||
|
||||
if(VGA_MEMORY < memaddr) {
|
||||
if(vga.vmemsize < memaddr) {
|
||||
//LOG_MSG("getpoint mem over: x%d y%d",x,y);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: int10_modes.cpp,v 1.74 2008-01-09 20:34:51 c2woody Exp $ */
|
||||
/* $Id: int10_modes.cpp,v 1.75 2008-01-12 17:37:48 c2woody Exp $ */
|
||||
|
||||
#include <string.h>
|
||||
|
||||
|
|
@ -368,7 +368,8 @@ static void FinishSetMode(bool clearmem) {
|
|||
case M_LIN16:
|
||||
case M_LIN32:
|
||||
/* Hack we just acess the memory directly */
|
||||
memset(vga.mem.linear,0,VGA_MEMORY);
|
||||
memset(vga.mem.linear,0,vga.vmemsize);
|
||||
memset(vga.fastmem, 0, vga.vmemsize<<1);
|
||||
}
|
||||
}
|
||||
/* Setup the BIOS */
|
||||
|
|
@ -1270,3 +1271,50 @@ dac_text16:
|
|||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
Bitu VideoModeMemSize(Bitu mode) {
|
||||
if (!IS_VGA_ARCH)
|
||||
return 0;
|
||||
|
||||
VideoModeBlock* modelist = NULL;
|
||||
|
||||
switch (svgaCard) {
|
||||
case SVGA_TsengET4K:
|
||||
case SVGA_TsengET3K:
|
||||
modelist = ModeList_VGA_Tseng;
|
||||
break;
|
||||
case SVGA_ParadisePVGA1A:
|
||||
modelist = ModeList_VGA_Paradise;
|
||||
break;
|
||||
default:
|
||||
modelist = ModeList_VGA;
|
||||
break;
|
||||
}
|
||||
|
||||
VideoModeBlock* vmodeBlock = NULL;
|
||||
Bitu i=0;
|
||||
while (modelist[i].mode!=0xffff) {
|
||||
if (modelist[i].mode==mode) {
|
||||
vmodeBlock = &modelist[i];
|
||||
break;
|
||||
}
|
||||
i++;
|
||||
}
|
||||
if (!vmodeBlock)
|
||||
return 0;
|
||||
|
||||
switch(vmodeBlock->type) {
|
||||
case M_LIN4:
|
||||
return vmodeBlock->swidth*vmodeBlock->sheight/2;
|
||||
case M_LIN8:
|
||||
return vmodeBlock->swidth*vmodeBlock->sheight;
|
||||
case M_LIN15: case M_LIN16:
|
||||
return vmodeBlock->swidth*vmodeBlock->sheight*2;
|
||||
case M_LIN32:
|
||||
return vmodeBlock->swidth*vmodeBlock->sheight*4;
|
||||
case M_TEXT:
|
||||
return vmodeBlock->twidth*vmodeBlock->theight*2;
|
||||
}
|
||||
// Return 0 for all other types, those always fit in memory
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (C) 2002-2007 The DOSBox Team
|
||||
* Copyright (C) 2002-2008 The DOSBox Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: int10_vesa.cpp,v 1.30 2007-12-10 22:11:13 c2woody Exp $ */
|
||||
/* $Id: int10_vesa.cpp,v 1.31 2008-01-12 17:37:48 c2woody Exp $ */
|
||||
|
||||
#include <string.h>
|
||||
#include <stddef.h>
|
||||
|
|
@ -115,7 +115,7 @@ Bit8u VESA_GetSVGAInformation(Bit16u seg,Bit16u off) {
|
|||
}
|
||||
mem_writed(buffer+0x0a,0x0); //Capabilities and flags
|
||||
mem_writed(buffer+0x0e,int10.rom.vesa_modes); //VESA Mode list
|
||||
mem_writew(buffer+0x12,Bit16u(VGA_MEMORY/(64*1024))); // memory size in 64kb blocks
|
||||
mem_writew(buffer+0x12,(Bit16u)(vga.vmemsize/(64*1024))); // memory size in 64kb blocks
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
|
|
@ -129,6 +129,9 @@ Bit8u VESA_GetSVGAModeInformation(Bit16u mode,Bit16u seg,Bit16u off) {
|
|||
|
||||
mode&=0x3fff; // vbe2 compatible, ignore lfb and keep screen content bits
|
||||
if (mode<0x100) return 0x01;
|
||||
if (svga.accepts_mode) {
|
||||
if (!svga.accepts_mode(mode)) return 0x01;
|
||||
}
|
||||
while (ModeList_VGA[i].mode!=0xffff) {
|
||||
if (mode==ModeList_VGA[i].mode) goto foundit; else i++;
|
||||
}
|
||||
|
|
@ -145,12 +148,12 @@ foundit:
|
|||
var_write(&minfo.MemoryModel,3); //ega planar mode
|
||||
modeAttributes = 0x1b; // Color, graphics, no linear buffer
|
||||
|
||||
if(pageSize > 512*1024) { // this limitation is not on the real card
|
||||
if(pageSize > vga.vmemsize/4) { // this limitation is not on the real card
|
||||
var_write(&minfo.ModeAttributes, modeAttributes & ~0x1);
|
||||
var_write(&minfo.NumberOfImagePages,0);
|
||||
} else {
|
||||
var_write(&minfo.ModeAttributes, modeAttributes);
|
||||
Bitu pages = (512*1024 / pageSize)-1;
|
||||
Bitu pages = ((vga.vmemsize/4) / pageSize)-1;
|
||||
var_write(&minfo.NumberOfImagePages,pages);
|
||||
}
|
||||
break;
|
||||
|
|
@ -227,13 +230,13 @@ foundit:
|
|||
var_write(&minfo.WinAAttributes,0x7); // Exists/readable/writable
|
||||
|
||||
if(mblock->type != M_LIN4)
|
||||
if(pageSize > VGA_MEMORY) {
|
||||
if(pageSize > vga.vmemsize) {
|
||||
// Mode not supported by current hardware configuration
|
||||
var_write(&minfo.ModeAttributes, modeAttributes & ~0x1);
|
||||
var_write(&minfo.NumberOfImagePages,0);
|
||||
} else {
|
||||
var_write(&minfo.ModeAttributes, modeAttributes);
|
||||
Bitu pages = (VGA_MEMORY / pageSize)-1;
|
||||
Bitu pages = (vga.vmemsize / pageSize)-1;
|
||||
var_write(&minfo.NumberOfImagePages,pages);
|
||||
}
|
||||
|
||||
|
|
@ -274,7 +277,7 @@ Bit8u VESA_GetSVGAMode(Bit16u & mode) {
|
|||
|
||||
Bit8u VESA_SetCPUWindow(Bit8u window,Bit8u address) {
|
||||
if (window) return 0x1;
|
||||
if ((address<32)) {
|
||||
if (((Bit32u)(address)*64*1024<vga.vmemsize)) {
|
||||
IO_Write(0x3d4,0x6a);
|
||||
IO_Write(0x3d5,(Bit8u)address);
|
||||
return 0x0;
|
||||
|
|
@ -359,7 +362,7 @@ Bit8u VESA_ScanLineLength(Bit8u subcall,Bit16u val, Bit16u & bytes,Bit16u & pixe
|
|||
case 0x03: /* Get maximum */
|
||||
bytes=0x400*4;
|
||||
pixels=bytes/bpp;
|
||||
lines = VGA_MEMORY / bytes;
|
||||
lines = (Bit16u)(vga.vmemsize / bytes);
|
||||
return 0x00;
|
||||
case 0x01: /* Get lengths */
|
||||
break;
|
||||
|
|
@ -375,12 +378,12 @@ Bit8u VESA_ScanLineLength(Bit8u subcall,Bit16u val, Bit16u & bytes,Bit16u & pixe
|
|||
if(CurMode->type==M_LIN4) {
|
||||
pixels=(vga.config.scan_len*16)/bpp;
|
||||
bytes=vga.config.scan_len*2;
|
||||
lines = Bit16u(VGA_MEMORY /( bytes*4));
|
||||
lines = (Bit16u)(vga.vmemsize /( bytes*4));
|
||||
}
|
||||
else {
|
||||
pixels=(vga.config.scan_len*8)/bpp;
|
||||
bytes=vga.config.scan_len*8;
|
||||
lines = Bit16u(VGA_MEMORY / bytes);
|
||||
lines = (Bit16u)(vga.vmemsize / bytes);
|
||||
}
|
||||
VGA_StartResize();
|
||||
return 0x0;
|
||||
|
|
@ -465,7 +468,12 @@ void INT10_SetupVESA(void) {
|
|||
int10.rom.vesa_modes=RealMake(0xc000,int10.rom.used);
|
||||
//TODO Maybe add normal vga modes too, but only seems to complicate things
|
||||
while (ModeList_VGA[i].mode!=0xffff) {
|
||||
if (ModeList_VGA[i].mode>=0x100){
|
||||
bool canuse_mode=false;
|
||||
if (!svga.accepts_mode) canuse_mode=true;
|
||||
else {
|
||||
if (svga.accepts_mode(ModeList_VGA[i].mode)) canuse_mode=true;
|
||||
}
|
||||
if (ModeList_VGA[i].mode>=0x100 && canuse_mode) {
|
||||
phys_writew(PhysMake(0xc000,int10.rom.used),ModeList_VGA[i].mode);
|
||||
int10.rom.used+=2;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue