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Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@87
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153d381f5d
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3 changed files with 13 additions and 260 deletions
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/*
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* Copyright (C) 2002 The DOSBox Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Library General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#define FLD(op1) { \
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FPU_GetZF; \
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fpu_flags.type=t_FLD; \
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if(--fpu_flags.sw.tos < 0) \
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fpu_flags.sw.tos = 7; \
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if( fpu_regs.st[fpu_flags.sw.tos].tag != FPUREG_EMPTY ) { \
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fpu_flags.result.tag = fpu_regs.st[fpu_flags.sw.tos].tag = FPUREG_NNAN; \
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break; \
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} \
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if(op1) \
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fpu_flags.result.tag = fpu_regs.st[fpu_flags.sw.tos].tag = FPUREG_VALID; \
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else \
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fpu_flags.result.tag = fpu_regs.st[fpu_flags.sw.tos].tag = FPUREG_ZERO; \
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fpu_flags.result.r = fpu_regs.st[fpu_flags.sw.tos].r = op1; \
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}
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#define FLDST(op1) { \
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FPU_GetZF; \
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fpu_flags.type=t_FLDST; \
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Bit8u reg = fpu_flags.sw.tos+op1; \
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if(reg>7) reg-=8; \
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if(--fpu_flags.sw.tos < 0) \
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fpu_flags.sw.tos = 7; \
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if(fpu_regs.st[fpu_flags.sw.tos].tag!=FPUREG_EMPTY) { \
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fpu_flags.result.tag = fpu_regs.st[fpu_flags.sw.tos].tag = FPUREG_NNAN; \
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break; \
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} \
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fpu_flags.result.tag = fpu_regs.st[fpu_flags.sw.tos].tag = fpu_regs.st[reg].tag; \
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fpu_flags.result.r = fpu_regs.st[fpu_flags.sw.tos].r = fpu_regs.st[reg].r; \
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}
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#define FPOP { \
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fpu_regs.st[fpu_flags.sw.tos].tag = FPUREG_EMPTY; \
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if(++fpu_flags.sw.tos > 7 ) \
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fpu_flags.sw.tos = 0; \
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}
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/* FPOP: fpu_flags.result.r = fpu_regs.st[fpu_flags.sw.tos].r = 0; is not really neccessary */
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#define FDIVP(op1,op2) { \
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Bit8u reg1 = fpu_flags.sw.tos+op1; \
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Bit8u reg2 = fpu_flags.sw.tos+op2; \
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fpu_flags.type=t_FDIVP; \
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if(reg1>7) reg1-=8; \
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if(reg2>7) reg2-=8; \
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if((fpu_regs.st[reg1].tag!=FPUREG_VALID && fpu_regs.st[reg1].tag!=FPUREG_ZERO)||(fpu_regs.st[reg2].tag!=FPUREG_VALID && fpu_regs.st[reg2].tag!=FPUREG_ZERO)) { \
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fpu_flags.result.tag = fpu_regs.st[reg1].tag = FPUREG_NNAN; \
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FPOP; \
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break; \
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} \
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if(fpu_regs.st[reg2].tag == FPUREG_ZERO) { \
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if(fpu_regs.st[reg1].r > 0) \
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fpu_flags.result.tag = fpu_regs.st[reg1].tag = FPUREG_PNAN; \
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else \
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fpu_flags.result.tag = fpu_regs.st[reg1].tag = FPUREG_NNAN; \
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FPOP; \
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break; \
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} \
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if(fpu_regs.st[reg1].tag == FPUREG_ZERO) { \
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fpu_flags.result.tag = fpu_regs.st[reg1].tag = FPUREG_ZERO; \
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FPOP; \
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break; \
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} \
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fpu_flags.result.tag = FPUREG_VALID; \
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fpu_flags.result.r = fpu_regs.st[reg1].r = fpu_regs.st[reg1].r / fpu_regs.st[reg2].r; \
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FPOP; \
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}
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#define FDIV(op1,op2) { \
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Bit8u reg1 = fpu_flags.sw.tos+op1; \
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Bit8u reg2 = fpu_flags.sw.tos+op2; \
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fpu_flags.type=t_FDIV; \
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if(reg1>7) reg1-=7; \
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if(reg2>7) reg2-=7; \
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if((fpu_regs.st[reg1].tag!=FPUREG_VALID && fpu_regs.st[reg1].tag!=FPUREG_ZERO)||(fpu_regs.st[reg2].tag!=FPUREG_VALID && fpu_regs.st[reg2].tag!=FPUREG_ZERO)) { \
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fpu_flags.result.tag = fpu_regs.st[reg1].tag = FPUREG_NNAN; \
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break; \
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} \
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if(fpu_regs.st[reg2].tag == FPUREG_ZERO) { \
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if(fpu_regs.st[reg1].r > 0) \
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fpu_flags.result.tag = fpu_regs.st[reg1].tag = FPUREG_PNAN; \
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else \
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fpu_flags.result.tag = fpu_regs.st[reg1].tag = FPUREG_NNAN; \
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break; \
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} \
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if(fpu_regs.st[reg1].tag == FPUREG_ZERO) { \
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fpu_flags.result.tag = fpu_regs.st[reg1].tag = FPUREG_ZERO; \
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break; \
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} \
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fpu_flags.result.tag = FPUREG_VALID; \
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fpu_flags.result.r = fpu_regs.st[reg1].r = fpu_regs.st[reg1].r / fpu_regs.st[reg2].r; \
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}
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#define FCHS { \
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FPU_GetZF; \
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fpu_flags.type=t_FCHS; \
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if(fpu_regs.st[fpu_flags.sw.tos].tag == FPUREG_PNAN) { \
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fpu_regs.st[fpu_flags.sw.tos].tag = FPUREG_NNAN; \
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} else if(fpu_regs.st[fpu_flags.sw.tos].tag == FPUREG_NNAN) { \
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fpu_regs.st[fpu_flags.sw.tos].tag = FPUREG_PNAN; \
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} else \
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fpu_regs.st[fpu_flags.sw.tos].r = -fpu_regs.st[fpu_flags.sw.tos].r; \
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}
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#define FCOMPP { \
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Bit8u reg = fpu_flags.sw.tos+1; \
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FPU_GetZF; \
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fpu_flags.type=t_FCOMP; \
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if(reg>7) \
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reg=0; \
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if((fpu_regs.st[reg].tag==FPUREG_VALID||fpu_regs.st[reg].tag==FPUREG_ZERO)&&(fpu_regs.st[fpu_flags.sw.tos].tag==FPUREG_VALID||fpu_regs.st[fpu_flags.sw.tos].tag==FPUREG_ZERO)) { \
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fpu_flags.result.r = fpu_regs.st[reg].r - fpu_regs.st[fpu_flags.sw.tos].r; \
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if(fpu_flags.result.r==0) \
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fpu_flags.result.tag = FPUREG_ZERO; \
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else \
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fpu_flags.result.tag = FPUREG_VALID; \
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FPOP; \
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FPOP; \
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return; \
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} else if(((fpu_regs.st[reg].tag==FPUREG_EMPTY)||(fpu_regs.st[fpu_flags.sw.tos].tag==FPUREG_EMPTY))||((fpu_regs.st[reg].tag==FPUREG_VALID||fpu_regs.st[reg].tag==FPUREG_ZERO)||(fpu_regs.st[fpu_flags.sw.tos].tag==FPUREG_VALID||fpu_regs.st[fpu_flags.sw.tos].tag==FPUREG_ZERO))) { \
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fpu_flags.result.tag = FPUREG_EMPTY; \
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FPOP; \
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FPOP; \
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return; \
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} \
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Bit8s res = (fpu_regs.st[reg].tag-fpu_regs.st[fpu_flags.sw.tos].tag); \
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if(res==0||fpu_flags.cw.ic==0) { \
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fpu_flags.result.tag = FPUREG_ZERO; \
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FPOP; \
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FPOP; \
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return; \
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} else if(res>0) { \
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fpu_flags.result.tag = FPUREG_NNAN; \
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FPOP; \
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FPOP; \
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return; \
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} \
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fpu_flags.result.tag = FPUREG_PNAN; \
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FPOP; \
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FPOP; \
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}
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@ -1,89 +0,0 @@
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/*
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* Copyright (C) 2002 The DOSBox Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Library General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#define FPU_ESC_0 { \
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Bit8u rm=Fetchb(); \
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if (rm>=0xc0) { \
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FPU_ESC0_Normal(rm); \
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} else { \
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GetEAa;FPU_ESC0_EA(rm,eaa); \
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} \
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}
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#define FPU_ESC_1 { \
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Bit8u rm=Fetchb(); \
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if (rm>=0xc0) { \
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FPU_ESC1_Normal(rm); \
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} else { \
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GetEAa;FPU_ESC1_EA(rm,eaa); \
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} \
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}
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#define FPU_ESC_2 { \
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Bit8u rm=Fetchb(); \
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if (rm>=0xc0) { \
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FPU_ESC2_Normal(rm); \
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} else { \
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GetEAa;FPU_ESC2_EA(rm,eaa); \
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} \
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}
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#define FPU_ESC_3 { \
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Bit8u rm=Fetchb(); \
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if (rm>=0xc0) { \
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FPU_ESC3_Normal(rm); \
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} else { \
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GetEAa;FPU_ESC3_EA(rm,eaa); \
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} \
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}
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#define FPU_ESC_4 { \
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Bit8u rm=Fetchb(); \
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if (rm>=0xc0) { \
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FPU_ESC4_Normal(rm); \
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} else { \
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GetEAa;FPU_ESC4_EA(rm,eaa); \
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} \
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}
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#define FPU_ESC_5 { \
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Bit8u rm=Fetchb(); \
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if (rm>=0xc0) { \
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FPU_ESC5_Normal(rm); \
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} else { \
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GetEAa;FPU_ESC5_EA(rm,eaa); \
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} \
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}
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#define FPU_ESC_6 { \
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Bit8u rm=Fetchb(); \
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if (rm>=0xc0) { \
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FPU_ESC6_Normal(rm); \
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} else { \
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GetEAa;FPU_ESC6_EA(rm,eaa); \
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} \
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}
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#define FPU_ESC_7 { \
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Bit8u rm=Fetchb(); \
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if (rm>=0xc0) { \
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FPU_ESC7_Normal(rm); \
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} else { \
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GetEAa;FPU_ESC7_EA(rm,eaa); \
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} \
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}
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@ -223,6 +223,10 @@ SOURCE=..\src\dos\dos.cpp
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# End Source File
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# Begin Source File
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SOURCE=..\src\dos\dos_classes.cpp
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# End Source File
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# Begin Source File
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SOURCE=..\src\dos\dos_devices.cpp
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# End Source File
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# Begin Source File
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# End Source File
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# Begin Source File
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SOURCE=..\src\misc\setup.cpp
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# End Source File
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# Begin Source File
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SOURCE=..\src\misc\support.cpp
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# End Source File
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# End Group
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# Begin Group "fpu"
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# PROP Default_Filter ""
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# Begin Group "fpu_core_16"
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# PROP Default_Filter ""
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# Begin Source File
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SOURCE=..\src\fpu\fpu_core_16\instructions.h
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# End Source File
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# Begin Source File
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SOURCE=..\src\fpu\fpu_core_16\support.h
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# End Source File
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# End Group
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# Begin Source File
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SOURCE=..\src\fpu\fpu.cpp
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# End Source File
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# Begin Source File
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SOURCE=..\src\fpu\fpu_flags.cpp
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SOURCE=..\src\fpu\fpu_instructions.h
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# End Source File
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# Begin Source File
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SOURCE=..\src\fpu\fpu_types.h
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# End Source File
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# End Group
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# Begin Group "visualc"
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