Added dual opl2 and opl3 emulation.
Fixed the sample rate config option not being used. Added different soundblaster type options. Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1699
This commit is contained in:
parent
30e64fda9b
commit
9d26cef41c
8 changed files with 3168 additions and 251 deletions
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@ -1,6 +1,6 @@
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AM_CPPFLAGS = -I$(top_srcdir)/include
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EXTRA_DIST = fmopl.c fmopl.h
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EXTRA_DIST = fmopl.c fmopl.h ymf262.h ymf262.c
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noinst_LIBRARIES = libhardware.a
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@ -10,3 +10,6 @@ libhardware_a_SOURCES = adlib.cpp dma.cpp gameblaster.cpp hardware.cpp iohandler
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vga_memory.cpp vga_misc.cpp vga_seq.cpp font-switch.h ega-switch.h cmos.cpp disney.cpp \
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gus.cpp mpu401.cpp serialport.cpp softmodem.cpp ipx.cpp ipxserver.cpp
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@ -29,9 +29,7 @@
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Thanks to vdmsound for nice simple way to implement this
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*/
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namespace MAME {
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/* Defines */
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# define logerror(x)
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# define logerror
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#ifdef _MSC_VER
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/* Disable recurring warnings */
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@ -39,166 +37,137 @@ namespace MAME {
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# pragma warning ( disable : 4244 )
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#endif
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/* Work around ANSI compliance problem (see driver.h) */
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struct __MALLOCPTR {
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void* m_ptr;
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struct __MALLOCPTR {
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void* m_ptr;
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__MALLOCPTR(void) : m_ptr(NULL) { }
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__MALLOCPTR(void* src) : m_ptr(src) { }
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void* operator=(void* rhs) { return (m_ptr = rhs); }
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operator int*() const { return (int*)m_ptr; }
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operator int**() const { return (int**)m_ptr; }
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operator char*() const { return (char*)m_ptr; }
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};
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/* Bring in the MAME OPL emulation */
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# define HAS_YM3812 1
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# include "fmopl.c"
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}
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struct OPLTimer_t {
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bool isEnabled;
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bool isMasked;
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bool isOverflowed;
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Bit64u count;
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Bit64u base;
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__MALLOCPTR(void) : m_ptr(NULL) { }
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__MALLOCPTR(void* src) : m_ptr(src) { }
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void* operator=(void* rhs) { return (m_ptr = rhs); }
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operator int*() const { return (int*)m_ptr; }
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operator int**() const { return (int**)m_ptr; }
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operator char*() const { return (char*)m_ptr; }
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};
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static OPLTimer_t timer1,timer2;
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static Bit8u regsel;
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namespace OPL2 {
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#define HAS_YM3812 1
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#include "fmopl.c"
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void TimerOver(Bitu val){
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YM3812TimerOver(val>>8,val & 0xff);
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}
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void TimerHandler(int channel,double interval_Sec) {
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PIC_AddEvent(TimerOver,1000000*interval_Sec,channel);
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}
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}
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#undef OSD_CPU_H
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#undef TL_TAB_LEN
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namespace OPL3 {
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#define HAS_YMF262 1
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#include "ymf262.c"
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void TimerOver(Bitu val){
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YMF262TimerOver(val>>8,val & 0xff);
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}
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void TimerHandler(int channel,double interval_Sec) {
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PIC_AddEvent(TimerOver,1000000*interval_Sec,channel);
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}
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}
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#define OPL_INTERNAL_FREQ 3600000 // The OPL operates at 3.6MHz
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#define OPL_NUM_CHIPS 1 // Number of OPL chips
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#define OPL_CHIP0 0
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#define OPL2_INTERNAL_FREQ 3600000 // The OPL2 operates at 3.6MHz
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#define OPL3_INTERNAL_FREQ 14400000 // The OPL3 operates at 14.4MHz
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static MIXER_Channel * adlib_chan;
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static struct {
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bool active;
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OPL_Mode mode;
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MIXER_Channel * chan;
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Bit32u last_used;
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Bit16s mixbuf[2][128];
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} opl;
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static void ADLIB_CallBack(Bit8u *stream, Bit32u len) {
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static void OPL_CallBack(Bit8u *stream, Bit32u len) {
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/* Check for size to update and check for 1 ms updates to the opl registers */
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/* Calculate teh machine ms we are at now */
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/* update 1 ms of data */
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MAME::YM3812UpdateOne(0,(MAME::INT16 *)stream,len);
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}
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Bitu i;
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switch(opl.mode) {
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case OPL_opl2:
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OPL2::YM3812UpdateOne(0,(OPL2::INT16 *)stream,len);
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break;
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case OPL_opl3:
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OPL3::YMF262UpdateOne(0,(OPL2::INT16 *)stream,len);
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break;
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case OPL_dualopl2:
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OPL2::YM3812UpdateOne(0,(OPL2::INT16 *)opl.mixbuf[0],len);
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OPL2::YM3812UpdateOne(1,(OPL2::INT16 *)opl.mixbuf[1],len);
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for (i=0;i<len;i++) {
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((Bit16u *)stream)[i*2+0]=opl.mixbuf[0][i];
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((Bit16u *)stream)[i*2+1]=opl.mixbuf[1][i];
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}
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break;
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static Bit8u read_p388(Bit32u port) {
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Bit8u ret=0;
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Bit64u micro=PIC_MicroCount();
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if (timer1.isEnabled) {
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if ((micro-timer1.base)>timer1.count) {
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timer1.isOverflowed=true;
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timer1.base=micro;
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}
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if (timer1.isOverflowed || !timer1.isMasked) {
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ret|=0xc0;
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}
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}
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if (timer2.isEnabled) {
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if ((micro-timer2.base)>timer2.count) {
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timer2.isOverflowed=true;
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timer2.base=micro;
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}
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if (timer2.isOverflowed || !timer2.isMasked) {
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ret|=0xA0;
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}
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}
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return ret;
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}
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static void write_p388(Bit32u port,Bit8u val) {
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regsel=val;
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// The following writes this value to ultrasounds equivalent register.
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// I don't know of any other way to do this
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IO_Write(0x248,val);
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}
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static void write_p389(Bit32u port,Bit8u val) {
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switch (regsel) {
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case 0x02: /* Timer 1 */
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timer1.count=val*80;
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return;
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case 0x03: /* Timer 2 */
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timer2.count=val*320;
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return;
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case 0x04: /* IRQ clear / mask and Timer enable */
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if (val&0x80) {
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timer1.isOverflowed=false;
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timer2.isOverflowed=false;
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return;
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}
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if (val&0x40) timer1.isMasked=true;
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else timer1.isMasked=false;
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if (val&1) {
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timer1.isEnabled=true;
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timer1.base=PIC_MicroCount();
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} else timer1.isEnabled=false;
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if (val&0x20) timer2.isMasked=true;
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else timer2.isMasked=false;
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if (val&2) {
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timer2.isEnabled=true;
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timer2.base=PIC_MicroCount();
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} else timer2.isEnabled=false;
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return;
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default: /* Normal OPL call queue it */
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/* Use a little hack to directly write to the register */
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MAME::OPLWriteReg(MAME::OPL_YM3812[0],regsel,val);
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if ((PIC_Ticks-opl.last_used)>1000) {
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MIXER_Enable(opl.chan,false);
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opl.active=false;
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}
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}
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static bool adlib_enabled;
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Bit8u OPL_Read(Bit32u port) {
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Bitu addr=port & 3;
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switch (opl.mode) {
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case OPL_opl2:
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return OPL2::YM3812Read(0,addr);
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case OPL_dualopl2:
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return OPL2::YM3812Read(addr>>1,addr);
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case OPL_opl3:
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return OPL3::YMF262Read(0,addr);
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}
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return 0xff;
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}
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static void ADLIB_Enable(bool enable) {
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if (enable) {
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adlib_enabled=true;
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MIXER_Enable(adlib_chan,true);
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IO_RegisterWriteHandler(0x388,write_p388,"ADLIB Register select");
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IO_RegisterWriteHandler(0x389,write_p389,"ADLIB Data Write");
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IO_RegisterReadHandler(0x388,read_p388,"ADLIB Status");
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IO_RegisterWriteHandler(0x220,write_p388,"ADLIB Register select");
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IO_RegisterWriteHandler(0x221,write_p389,"ADLIB Data Write");
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IO_RegisterReadHandler(0x220,read_p388,"ADLIB Status");
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} else {
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adlib_enabled=false;
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MIXER_Enable(adlib_chan,false);
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IO_FreeWriteHandler(0x220);
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IO_FreeWriteHandler(0x221);
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IO_FreeReadHandler(0x220);
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IO_FreeWriteHandler(0x388);
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IO_FreeWriteHandler(0x389);
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IO_FreeReadHandler(0x388);
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void OPL_Write(Bit32u port,Bit8u val) {
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opl.last_used=PIC_Ticks;
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if (!opl.active) {
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opl.active=true;
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MIXER_Enable(opl.chan,true);
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}
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Bitu addr=port & 3;
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switch (opl.mode) {
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case OPL_opl2:
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OPL2::YM3812Write(0,addr,val);
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break;
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case OPL_opl3:
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OPL3::YMF262Write(0,addr,val);
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break;
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case OPL_dualopl2:
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OPL2::YM3812Write(addr>>1,addr,val);
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break;
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}
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}
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void ADLIB_Init(Section* sec) {
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void OPL_Init(Section* sec,OPL_Mode oplmode,Bitu rate) {
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Bitu i;
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Section_prop * section=static_cast<Section_prop *>(sec);
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if(!section->Get_bool("adlib")) return;
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timer1.isMasked=true;
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timer1.base=0;
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timer1.count=0;
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timer1.isEnabled=false;
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timer1.isOverflowed=false;
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timer2.isMasked=true;
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timer2.base=0;
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timer2.count=0;
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timer2.isEnabled=false;
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timer2.isOverflowed=false;
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#define ADLIB_FREQ 22050
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if (MAME::YM3812Init(OPL_NUM_CHIPS,OPL_INTERNAL_FREQ,ADLIB_FREQ)) {
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E_Exit("Can't create adlib OPL Emulator");
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if (OPL2::YM3812Init(2,OPL2_INTERNAL_FREQ,rate)) {
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E_Exit("Can't create OPL2 Emulator");
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};
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OPL2::YM3812SetTimerHandler(0,OPL2::TimerHandler,0);
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OPL2::YM3812SetTimerHandler(1,OPL2::TimerHandler,256);
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if (OPL3::YMF262Init(1,OPL3_INTERNAL_FREQ,rate)) {
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E_Exit("Can't create OPL3 Emulator");
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};
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OPL3::YMF262SetTimerHandler(0,OPL3::TimerHandler,0);
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for (i=0;i<4;i++) {
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IO_RegisterWriteHandler(0x388+i,OPL_Write,"OPL Write");
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IO_RegisterReadHandler(0x388+i,OPL_Read,"OPL read");
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IO_RegisterWriteHandler(0x220+i,OPL_Write,"OPL Write");
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IO_RegisterReadHandler(0x220+i,OPL_Read,"OPL read");
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}
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opl.active=false;
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opl.last_used=0;
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opl.mode=oplmode;
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adlib_chan=MIXER_AddChannel(ADLIB_CallBack,ADLIB_FREQ,"ADLIB");
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MIXER_SetMode(adlib_chan,MIXER_16MONO);
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ADLIB_Enable(true);
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opl.chan=MIXER_AddChannel(OPL_CallBack,rate,"ADLIB");
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MIXER_SetMode(opl.chan,(opl.mode>OPL_opl2) ? MIXER_16STEREO : MIXER_16MONO);
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MIXER_Enable(opl.chan,false);
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};
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@ -3,14 +3,23 @@
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** File: fmopl.c - software implementation of FM sound generator
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** types OPL and OPL2
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**
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** Copyright (C) 2002,2003 Jarek Burczynski (bujar at mame dot net)
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** Copyright (C) 1999,2000 Tatsuyuki Satoh , MultiArcadeMachineEmulator development
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** Copyright (C) 2002 Jarek Burczynski
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**
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** Version 0.60
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** Version 0.70
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**
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Revision History:
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14-06-2003 Jarek Burczynski:
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- implemented all of the status register flags in Y8950 emulation
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- renamed Y8950SetDeltaTMemory() parameters from _rom_ to _mem_ since
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they can be either RAM or ROM
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08-10-2002 Jarek Burczynski (thanks to Dox for the YM3526 chip)
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- corrected YM3526Read() to always set bit 2 and bit 1
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to HIGH state - identical to YM3812Read (verified on real YM3526)
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04-28-2002 Jarek Burczynski:
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- binary exact Envelope Generator (verified on real YM3812);
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compared to YM2151: the EG clock is equal to internal_clock,
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@ -51,9 +60,8 @@ Revision History:
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdarg.h>
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#include <math.h>
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//#include "driver.h" /* use M.A.M.E. */
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#include "fmopl.h"
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@ -117,10 +125,45 @@ Revision History:
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/*#define SAVE_SAMPLE*/
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#ifdef SAVE_SAMPLE
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INLINE signed int acc_calc(signed int value)
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{
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if (value>=0)
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{
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if (value < 0x0200)
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return (value & ~0);
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if (value < 0x0400)
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return (value & ~1);
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if (value < 0x0800)
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return (value & ~3);
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if (value < 0x1000)
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return (value & ~7);
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if (value < 0x2000)
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return (value & ~15);
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if (value < 0x4000)
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return (value & ~31);
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return (value & ~63);
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}
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/*else value < 0*/
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if (value > -0x0200)
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return (~abs(value) & ~0);
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if (value > -0x0400)
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return (~abs(value) & ~1);
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if (value > -0x0800)
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return (~abs(value) & ~3);
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if (value > -0x1000)
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return (~abs(value) & ~7);
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if (value > -0x2000)
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return (~abs(value) & ~15);
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if (value > -0x4000)
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return (~abs(value) & ~31);
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return (~abs(value) & ~63);
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}
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static FILE *sample[1];
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#if 1 /*save to MONO file */
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#define SAVE_ALL_CHANNELS \
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{ signed int pom = lt; \
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{ signed int pom = acc_calc(lt); \
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fputc((unsigned short)pom&0xff,sample[0]); \
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fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
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}
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/* Saving is necessary for member of the 'R' mark for suspend/resume */
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typedef struct{
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UINT32 ar; /* attack rate: AR<<2 */
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UINT32 dr; /* decay rate: DR<<2 */
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@ -181,14 +222,12 @@ typedef struct{
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INT32 TLL; /* adjusted now TL */
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INT32 volume; /* envelope counter */
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UINT32 sl; /* sustain level: sl_tab[SL] */
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UINT8 eg_sh_ar; /* (attack state) */
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UINT8 eg_sel_ar; /* (attack state) */
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UINT8 eg_sh_dr; /* (decay state) */
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UINT8 eg_sel_dr; /* (decay state) */
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UINT8 eg_sh_rr; /* (release state) */
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UINT8 eg_sel_rr; /* (release state) */
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UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */
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/* LFO */
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@ -244,7 +283,7 @@ typedef struct fm_opl_f {
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YM_DELTAT *deltat;
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/* Keyboard / I/O interface unit*/
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/* Keyboard and I/O ports interface */
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UINT8 portDirection;
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UINT8 portLatch;
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OPL_PORTHANDLER_R porthandler_r;
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@ -375,7 +414,7 @@ static const unsigned char eg_inc[15*RATE_STEPS]={
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/*note that there is no O(13) in this table - it's directly in the code */
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static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
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/* 16 dummy (infinite time) rates */
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/* 16 infinite time rates */
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O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
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O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
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@ -410,13 +449,13 @@ O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
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};
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#undef O
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//rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
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//shift 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0
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//mask 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0
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/*rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 */
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/*shift 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0 */
|
||||
/*mask 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0 */
|
||||
|
||||
#define O(a) (a*1)
|
||||
static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
|
||||
/* 16 dummy (infinite time) rates */
|
||||
/* 16 infinite time rates */
|
||||
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
|
||||
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
|
||||
|
||||
|
@ -586,15 +625,15 @@ static const INT8 lfo_pm_table[8*8*2] = {
|
|||
/* lock level of common table */
|
||||
static int num_lock = 0;
|
||||
|
||||
/* work table */
|
||||
static void *cur_chip = NULL; /* current chip point */
|
||||
OPL_SLOT *SLOT7_1,*SLOT7_2,*SLOT8_1,*SLOT8_2;
|
||||
|
||||
static signed int phase_modulation; /* phase modulation input (SLOT 2) */
|
||||
static void *cur_chip = NULL; /* current chip pointer */
|
||||
static OPL_SLOT *SLOT7_1, *SLOT7_2, *SLOT8_1, *SLOT8_2;
|
||||
|
||||
static signed int phase_modulation; /* phase modulation input (SLOT 2) */
|
||||
static signed int output[1];
|
||||
|
||||
#if BUILD_Y8950
|
||||
static INT32 output_deltat[4]; /* for Y8950 DELTA-T */
|
||||
static INT32 output_deltat[4]; /* for Y8950 DELTA-T, chip is mono, that 4 here is just for safety */
|
||||
#endif
|
||||
|
||||
static UINT32 LFO_AM;
|
||||
|
@ -699,8 +738,6 @@ INLINE void advance(FM_OPL *OPL)
|
|||
switch(op->state)
|
||||
{
|
||||
case EG_ATT: /* attack phase */
|
||||
{
|
||||
|
||||
if ( !(OPL->eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
|
||||
{
|
||||
op->volume += (~op->volume *
|
||||
|
@ -714,8 +751,6 @@ INLINE void advance(FM_OPL *OPL)
|
|||
}
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
break;
|
||||
|
||||
case EG_DEC: /* decay phase */
|
||||
|
@ -792,7 +827,7 @@ INLINE void advance(FM_OPL *OPL)
|
|||
{
|
||||
block_fnum += lfo_fn_table_index_offset;
|
||||
block = (block_fnum&0x1c00) >> 10;
|
||||
op->Cnt += (OPL->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul;//ok
|
||||
op->Cnt += (OPL->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul;
|
||||
}
|
||||
else /* LFO phase modulation = zero */
|
||||
{
|
||||
|
@ -857,15 +892,8 @@ INLINE signed int op_calc(UINT32 phase, unsigned int env, signed int pm, unsigne
|
|||
INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
|
||||
{
|
||||
UINT32 p;
|
||||
INT32 i;
|
||||
|
||||
i = (phase & ~FREQ_MASK) + pm;
|
||||
|
||||
/*logerror("i=%08x (i>>16)&511=%8i phase=%i [pm=%08x] ",i, (i>>16)&511, phase>>FREQ_SH, pm);*/
|
||||
|
||||
p = (env<<4) + sin_tab[ wave_tab + ((i>>FREQ_SH) & SIN_MASK)];
|
||||
|
||||
/*logerror("(p&255=%i p>>8=%i) out= %i\n", p&255,p>>8, tl_tab[p&255]>>(p>>8) );*/
|
||||
p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + pm )) >> FREQ_SH ) & SIN_MASK) ];
|
||||
|
||||
if (p >= TL_TAB_LEN)
|
||||
return 0;
|
||||
|
@ -966,7 +994,7 @@ INLINE void OPL_CALC_RH( OPL_CH *CH, unsigned int noise )
|
|||
|
||||
if (!SLOT->CON)
|
||||
phase_modulation = SLOT->op1_out[0];
|
||||
//else ignore output of operator 1
|
||||
/* else ignore output of operator 1 */
|
||||
|
||||
SLOT->op1_out[1] = 0;
|
||||
if( env < ENV_QUIET )
|
||||
|
@ -984,16 +1012,16 @@ INLINE void OPL_CALC_RH( OPL_CH *CH, unsigned int noise )
|
|||
|
||||
|
||||
/* Phase generation is based on: */
|
||||
// HH (13) channel 7->slot 1 combined with channel 8->slot 2 (same combination as TOP CYMBAL but different output phases)
|
||||
// SD (16) channel 7->slot 1
|
||||
// TOM (14) channel 8->slot 1
|
||||
// TOP (17) channel 7->slot 1 combined with channel 8->slot 2 (same combination as HIGH HAT but different output phases)
|
||||
/* HH (13) channel 7->slot 1 combined with channel 8->slot 2 (same combination as TOP CYMBAL but different output phases) */
|
||||
/* SD (16) channel 7->slot 1 */
|
||||
/* TOM (14) channel 8->slot 1 */
|
||||
/* TOP (17) channel 7->slot 1 combined with channel 8->slot 2 (same combination as HIGH HAT but different output phases) */
|
||||
|
||||
/* Envelope generation based on: */
|
||||
// HH channel 7->slot1
|
||||
// SD channel 7->slot2
|
||||
// TOM channel 8->slot1
|
||||
// TOP channel 8->slot2
|
||||
/* HH channel 7->slot1 */
|
||||
/* SD channel 7->slot2 */
|
||||
/* TOM channel 8->slot1 */
|
||||
/* TOP channel 8->slot2 */
|
||||
|
||||
|
||||
/* The following formulas can be well optimized.
|
||||
|
@ -1048,7 +1076,7 @@ INLINE void OPL_CALC_RH( OPL_CH *CH, unsigned int noise )
|
|||
phase = 0xd0>>2;
|
||||
}
|
||||
|
||||
output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT->wavetable) * 2;
|
||||
output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2;
|
||||
}
|
||||
|
||||
/* Snare Drum (verified on real YM3812) */
|
||||
|
@ -1069,13 +1097,13 @@ INLINE void OPL_CALC_RH( OPL_CH *CH, unsigned int noise )
|
|||
if (noise)
|
||||
phase ^= 0x100;
|
||||
|
||||
output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT->wavetable) * 2;
|
||||
output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_2->wavetable) * 2;
|
||||
}
|
||||
|
||||
/* Tom Tom (verified on real YM3812) */
|
||||
env = volume_calc(SLOT8_1);
|
||||
if( env < ENV_QUIET )
|
||||
output[0] += op_calc(SLOT8_1->Cnt, env, 0, SLOT->wavetable) * 2;
|
||||
output[0] += op_calc(SLOT8_1->Cnt, env, 0, SLOT8_1->wavetable) * 2;
|
||||
|
||||
/* Top Cymbal (verified on real YM3812) */
|
||||
env = volume_calc(SLOT8_2);
|
||||
|
@ -1102,7 +1130,7 @@ INLINE void OPL_CALC_RH( OPL_CH *CH, unsigned int noise )
|
|||
if (res2)
|
||||
phase = 0x300;
|
||||
|
||||
output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT->wavetable) * 2;
|
||||
output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT8_2->wavetable) * 2;
|
||||
}
|
||||
|
||||
}
|
||||
|
@ -1229,13 +1257,14 @@ static void OPL_initalize(FM_OPL *OPL)
|
|||
int i;
|
||||
|
||||
/* frequency base */
|
||||
#if 1
|
||||
OPL->freqbase = (OPL->rate) ? ((double)OPL->clock / 72.0) / OPL->rate : 0;
|
||||
#else
|
||||
#if 0
|
||||
OPL->rate = (double)OPL->clock / 72.0;
|
||||
OPL->freqbase = 1.0;
|
||||
#endif
|
||||
|
||||
/*logerror("freqbase=%f\n", OPL->freqbase);*/
|
||||
|
||||
/* Timer base time */
|
||||
OPL->TimerBase = 1.0 / ((double)OPL->clock / 72.0 );
|
||||
|
||||
|
@ -1458,9 +1487,11 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
|
|||
{ /* set IRQ mask ,timer enable*/
|
||||
UINT8 st1 = v&1;
|
||||
UINT8 st2 = (v>>1)&1;
|
||||
|
||||
/* IRQRST,T1MSK,t2MSK,EOSMSK,BRMSK,x,ST2,ST1 */
|
||||
OPL_STATUS_RESET(OPL,v&0x78);
|
||||
OPL_STATUSMASK_SET(OPL,((~v)&0x78)|0x01);
|
||||
OPL_STATUS_RESET(OPL, v & 0x78 );
|
||||
OPL_STATUSMASK_SET(OPL, (~v) & 0x78 );
|
||||
|
||||
/* timer 2 */
|
||||
if(OPL->st[1] != st2)
|
||||
{
|
||||
|
@ -1484,34 +1515,43 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
|
|||
if(OPL->keyboardhandler_w)
|
||||
OPL->keyboardhandler_w(OPL->keyboard_param,v);
|
||||
else
|
||||
logerror("OPL:write unmapped KEYBOARD port\n");
|
||||
logerror("Y8950: write unmapped KEYBOARD port\n");
|
||||
}
|
||||
break;
|
||||
case 0x07: /* DELTA-T controll : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */
|
||||
case 0x07: /* DELTA-T control 1 : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */
|
||||
if(OPL->type&OPL_TYPE_ADPCM)
|
||||
YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
|
||||
break;
|
||||
case 0x08: /* MODE,DELTA-T : CSM,NOTESEL,x,x,smpl,da/ad,64k,rom */
|
||||
#endif
|
||||
case 0x08: /* MODE,DELTA-T control 2 : CSM,NOTESEL,x,x,smpl,da/ad,64k,rom */
|
||||
OPL->mode = v;
|
||||
v&=0x1f; /* for DELTA-T unit */
|
||||
#if BUILD_Y8950
|
||||
if(OPL->type&OPL_TYPE_ADPCM)
|
||||
YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v&0x0f); /* mask 4 LSBs in register 08 for DELTA-T unit */
|
||||
#endif
|
||||
break;
|
||||
|
||||
#if BUILD_Y8950
|
||||
case 0x09: /* START ADD */
|
||||
case 0x0a:
|
||||
case 0x0b: /* STOP ADD */
|
||||
case 0x0c:
|
||||
case 0x0d: /* PRESCALE */
|
||||
case 0x0e:
|
||||
case 0x0f: /* ADPCM data */
|
||||
case 0x0f: /* ADPCM data write */
|
||||
case 0x10: /* DELTA-N */
|
||||
case 0x11: /* DELTA-N */
|
||||
case 0x12: /* EG-CTRL */
|
||||
case 0x12: /* ADPCM volume */
|
||||
if(OPL->type&OPL_TYPE_ADPCM)
|
||||
YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
|
||||
break;
|
||||
#if 0
|
||||
case 0x15: /* DAC data */
|
||||
case 0x16:
|
||||
case 0x17: /* SHIFT */
|
||||
|
||||
case 0x15: /* DAC data high 8 bits (F7,F6...F2) */
|
||||
case 0x16: /* DAC data low 2 bits (F1, F0 in bits 7,6) */
|
||||
case 0x17: /* DAC data shift (S2,S1,S0 in bits 2,1,0) */
|
||||
logerror("FMOPL.C: DAC data register written, but not implemented reg=%02x val=%02x\n",r,v);
|
||||
break;
|
||||
|
||||
case 0x18: /* I/O CTRL (Direction) */
|
||||
if(OPL->type&OPL_TYPE_IO)
|
||||
OPL->portDirection = v&0x0f;
|
||||
|
@ -1524,10 +1564,10 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
|
|||
OPL->porthandler_w(OPL->port_param,v&OPL->portDirection);
|
||||
}
|
||||
break;
|
||||
case 0x1a: /* PCM data */
|
||||
#endif
|
||||
default:
|
||||
logerror("FMOPL.C: write to unknown register: %02x\n",r);
|
||||
break;
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
break;
|
||||
case 0x20: /* am ON, vib ON, ksr, eg_type, mul */
|
||||
|
@ -1773,7 +1813,7 @@ static void OPLResetChip(FM_OPL *OPL)
|
|||
#endif
|
||||
}
|
||||
|
||||
/* Create one of virtual YM3812 */
|
||||
/* Create one of virtual YM3812/YM3526/Y8950 */
|
||||
/* 'clock' is chip clock in Hz */
|
||||
/* 'rate' is sampling rate */
|
||||
static FM_OPL *OPLCreate(int type, int clock, int rate)
|
||||
|
@ -1806,7 +1846,9 @@ static FM_OPL *OPLCreate(int type, int clock, int rate)
|
|||
|
||||
#if BUILD_Y8950
|
||||
if (type&OPL_TYPE_ADPCM)
|
||||
{
|
||||
OPL->deltat = (YM_DELTAT *)ptr;
|
||||
}
|
||||
ptr += sizeof(YM_DELTAT);
|
||||
#endif
|
||||
|
||||
|
@ -1817,8 +1859,6 @@ static FM_OPL *OPLCreate(int type, int clock, int rate)
|
|||
/* init global tables */
|
||||
OPL_initalize(OPL);
|
||||
|
||||
/* reset chip */
|
||||
OPLResetChip(OPL);
|
||||
return OPL;
|
||||
}
|
||||
|
||||
|
@ -1829,7 +1869,7 @@ static void OPLDestroy(FM_OPL *OPL)
|
|||
free(OPL);
|
||||
}
|
||||
|
||||
/* Option handlers */
|
||||
/* Optional handlers */
|
||||
|
||||
static void OPLSetTimerHandler(FM_OPL *OPL,OPL_TIMERHANDLER TimerHandler,int channelOffset)
|
||||
{
|
||||
|
@ -1847,7 +1887,6 @@ static void OPLSetUpdateHandler(FM_OPL *OPL,OPL_UPDATEHANDLER UpdateHandler,int
|
|||
OPL->UpdateParam = param;
|
||||
}
|
||||
|
||||
/* YM3812 I/O interface */
|
||||
static int OPLWrite(FM_OPL *OPL,int a,int v)
|
||||
{
|
||||
if( !(a&1) )
|
||||
|
@ -1867,6 +1906,17 @@ static unsigned char OPLRead(FM_OPL *OPL,int a)
|
|||
if( !(a&1) )
|
||||
{
|
||||
/* status port */
|
||||
|
||||
#if BUILD_Y8950
|
||||
|
||||
if(OPL->type&OPL_TYPE_ADPCM) /* Y8950 */
|
||||
{
|
||||
return (OPL->status & (OPL->statusmask|0x80)) | (OPL->deltat->PCM_BSY&1);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/* OPL and OPL2 */
|
||||
return OPL->status & (OPL->statusmask|0x80);
|
||||
}
|
||||
|
||||
|
@ -1880,23 +1930,36 @@ static unsigned char OPLRead(FM_OPL *OPL,int a)
|
|||
if(OPL->keyboardhandler_r)
|
||||
return OPL->keyboardhandler_r(OPL->keyboard_param);
|
||||
else
|
||||
logerror("OPL:read unmapped KEYBOARD port\n");
|
||||
logerror("Y8950: read unmapped KEYBOARD port\n");
|
||||
}
|
||||
return 0;
|
||||
#if 0
|
||||
|
||||
case 0x0f: /* ADPCM-DATA */
|
||||
if(OPL->type&OPL_TYPE_ADPCM)
|
||||
{
|
||||
UINT8 val;
|
||||
|
||||
val = YM_DELTAT_ADPCM_Read(OPL->deltat);
|
||||
/*logerror("Y8950: read ADPCM value read=%02x\n",val);*/
|
||||
return val;
|
||||
}
|
||||
return 0;
|
||||
#endif
|
||||
|
||||
case 0x19: /* I/O DATA */
|
||||
if(OPL->type&OPL_TYPE_IO)
|
||||
{
|
||||
if(OPL->porthandler_r)
|
||||
return OPL->porthandler_r(OPL->port_param);
|
||||
else
|
||||
logerror("OPL:read unmapped I/O port\n");
|
||||
logerror("Y8950:read unmapped I/O port\n");
|
||||
}
|
||||
return 0;
|
||||
case 0x1a: /* PCM-DATA */
|
||||
if(OPL->type&OPL_TYPE_ADPCM)
|
||||
{
|
||||
logerror("Y8950 A/D convertion is accessed but not implemented !\n");
|
||||
return 0x80; /* 2's complement PCM data - result from A/D convertion */
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
@ -1968,6 +2031,8 @@ int YM3812Init(int num, int clock, int rate)
|
|||
YM3812NumChips = 0;
|
||||
return -1;
|
||||
}
|
||||
/* reset */
|
||||
YM3812ResetChip(i);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -2076,7 +2141,10 @@ void YM3812UpdateOne(int which, INT16 *buffer, int length)
|
|||
lt = limit( lt , MAXOUT, MINOUT );
|
||||
|
||||
#ifdef SAVE_SAMPLE
|
||||
if (which==0)
|
||||
{
|
||||
SAVE_ALL_CHANNELS
|
||||
}
|
||||
#endif
|
||||
|
||||
/* store to sound buffer */
|
||||
|
@ -2114,6 +2182,8 @@ int YM3526Init(int num, int clock, int rate)
|
|||
YM3526NumChips = 0;
|
||||
return -1;
|
||||
}
|
||||
/* reset */
|
||||
YM3526ResetChip(i);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -2143,7 +2213,8 @@ int YM3526Write(int which, int a, int v)
|
|||
|
||||
unsigned char YM3526Read(int which, int a)
|
||||
{
|
||||
return OPLRead(OPL_YM3526[which], a);
|
||||
/* YM3526 always returns bit2 and bit1 in HIGH state */
|
||||
return OPLRead(OPL_YM3526[which], a) | 0x06 ;
|
||||
}
|
||||
int YM3526TimerOver(int which, int c)
|
||||
{
|
||||
|
@ -2221,7 +2292,10 @@ void YM3526UpdateOne(int which, INT16 *buffer, int length)
|
|||
lt = limit( lt , MAXOUT, MINOUT );
|
||||
|
||||
#ifdef SAVE_SAMPLE
|
||||
if (which==0)
|
||||
{
|
||||
SAVE_ALL_CHANNELS
|
||||
}
|
||||
#endif
|
||||
|
||||
/* store to sound buffer */
|
||||
|
@ -2241,6 +2315,15 @@ void YM3526UpdateOne(int which, INT16 *buffer, int length)
|
|||
static FM_OPL *OPL_Y8950[MAX_OPL_CHIPS]; /* array of pointers to the Y8950's */
|
||||
static int Y8950NumChips = 0; /* number of chips */
|
||||
|
||||
static void Y8950_deltat_status_set(UINT8 which, UINT8 changebits)
|
||||
{
|
||||
OPL_STATUS_SET(OPL_Y8950[which], changebits);
|
||||
}
|
||||
static void Y8950_deltat_status_reset(UINT8 which, UINT8 changebits)
|
||||
{
|
||||
OPL_STATUS_RESET(OPL_Y8950[which], changebits);
|
||||
}
|
||||
|
||||
int Y8950Init(int num, int clock, int rate)
|
||||
{
|
||||
int i;
|
||||
|
@ -2260,6 +2343,13 @@ int Y8950Init(int num, int clock, int rate)
|
|||
Y8950NumChips = 0;
|
||||
return -1;
|
||||
}
|
||||
OPL_Y8950[i]->deltat->status_set_handler = Y8950_deltat_status_set;
|
||||
OPL_Y8950[i]->deltat->status_reset_handler = Y8950_deltat_status_reset;
|
||||
OPL_Y8950[i]->deltat->status_change_which_chip = i;
|
||||
OPL_Y8950[i]->deltat->status_change_EOS_bit = 0x10; /* status flag: set bit4 on End Of Sample */
|
||||
OPL_Y8950[i]->deltat->status_change_BRDY_bit = 0x08; /* status flag: set bit3 on BRDY (End Of: ADPCM analysis/synthesis, memory reading/writing) */
|
||||
/* reset */
|
||||
Y8950ResetChip(i);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -2309,11 +2399,11 @@ void Y8950SetUpdateHandler(int which,OPL_UPDATEHANDLER UpdateHandler,int param)
|
|||
OPLSetUpdateHandler(OPL_Y8950[which], UpdateHandler, param);
|
||||
}
|
||||
|
||||
void Y8950SetDeltaTMemory(int which, void * deltat_rom, int deltat_rom_size )
|
||||
void Y8950SetDeltaTMemory(int which, void * deltat_mem_ptr, int deltat_mem_size )
|
||||
{
|
||||
FM_OPL *OPL = OPL_Y8950[which];
|
||||
OPL->deltat->memory = (UINT8 *)(deltat_rom);
|
||||
OPL->deltat->memory_size = deltat_rom_size;
|
||||
OPL->deltat->memory = (UINT8 *)(deltat_mem_ptr);
|
||||
OPL->deltat->memory_size = deltat_mem_size;
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -2331,9 +2421,6 @@ void Y8950UpdateOne(int which, INT16 *buffer, int length)
|
|||
YM_DELTAT *DELTAT = OPL->deltat;
|
||||
OPLSAMPLE *buf = buffer;
|
||||
|
||||
/* setup DELTA-T unit */
|
||||
YM_DELTAT_DECODE_PRESET(DELTAT);
|
||||
|
||||
if( (void *)OPL != cur_chip ){
|
||||
cur_chip = (void *)OPL;
|
||||
/* rhythm slots */
|
||||
|
@ -2353,7 +2440,7 @@ void Y8950UpdateOne(int which, INT16 *buffer, int length)
|
|||
advance_lfo(OPL);
|
||||
|
||||
/* deltaT ADPCM */
|
||||
if( DELTAT->portstate )
|
||||
if( DELTAT->portstate&0x80 )
|
||||
YM_DELTAT_ADPCM_CALC(DELTAT);
|
||||
|
||||
/* FM part */
|
||||
|
@ -2383,7 +2470,10 @@ void Y8950UpdateOne(int which, INT16 *buffer, int length)
|
|||
lt = limit( lt , MAXOUT, MINOUT );
|
||||
|
||||
#ifdef SAVE_SAMPLE
|
||||
if (which==0)
|
||||
{
|
||||
SAVE_ALL_CHANNELS
|
||||
}
|
||||
#endif
|
||||
|
||||
/* store to sound buffer */
|
||||
|
@ -2392,15 +2482,6 @@ void Y8950UpdateOne(int which, INT16 *buffer, int length)
|
|||
advance(OPL);
|
||||
}
|
||||
|
||||
/* deltaT START flag */
|
||||
if( !DELTAT->portstate )
|
||||
OPL->status &= 0xfe;
|
||||
|
||||
if( DELTAT->eos ) //AT: set bit 4 of OPL status register on EOS
|
||||
{
|
||||
DELTAT->eos = 0;
|
||||
OPL->status |= 0x10;
|
||||
}
|
||||
}
|
||||
|
||||
void Y8950SetPortHandler(int which,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHANDLER_R PortHandler_r,int param)
|
||||
|
|
|
@ -91,7 +91,7 @@ void YM3526SetUpdateHandler(int which, OPL_UPDATEHANDLER UpdateHandler, int para
|
|||
/* Y8950 port handlers */
|
||||
void Y8950SetPortHandler(int which, OPL_PORTHANDLER_W PortHandler_w, OPL_PORTHANDLER_R PortHandler_r, int param);
|
||||
void Y8950SetKeyboardHandler(int which, OPL_PORTHANDLER_W KeyboardHandler_w, OPL_PORTHANDLER_R KeyboardHandler_r, int param);
|
||||
void Y8950SetDeltaTMemory(int which, void * deltat_rom, int deltat_rom_size );
|
||||
void Y8950SetDeltaTMemory(int which, void * deltat_mem_ptr, int deltat_mem_size );
|
||||
|
||||
int Y8950Init (int num, int clock, int rate);
|
||||
void Y8950Shutdown (void);
|
||||
|
|
|
@ -420,10 +420,10 @@ static void write_cms(Bit32u port,Bit8u val) {
|
|||
}
|
||||
|
||||
|
||||
void CMS_Init(Section* sec) {
|
||||
void CMS_Init(Section* sec,Bitu rate) {
|
||||
Section_prop * section=static_cast<Section_prop *>(sec);
|
||||
if(!section->Get_bool("cms")) return;
|
||||
sample_rate=section->Get_int("cmsrate");
|
||||
sample_rate=rate;
|
||||
|
||||
IO_RegisterWriteHandler(0x220,write_cms,"CMS");
|
||||
IO_RegisterWriteHandler(0x221,write_cms,"CMS");
|
||||
|
@ -432,7 +432,7 @@ void CMS_Init(Section* sec) {
|
|||
|
||||
/* Register the Mixer CallBack */
|
||||
|
||||
cms_chan=MIXER_AddChannel(CMS_CallBack,CMS_RATE,"CMS");
|
||||
cms_chan=MIXER_AddChannel(CMS_CallBack,rate,"CMS");
|
||||
MIXER_SetMode(cms_chan,MIXER_16STEREO);
|
||||
MIXER_Enable(cms_chan,true);
|
||||
last_command=PIC_Ticks;
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
#include "pic.h"
|
||||
#include "hardware.h"
|
||||
#include "setup.h"
|
||||
#include "support.h"
|
||||
#include "programs.h"
|
||||
|
||||
#define SB_PIC_EVENTS 0
|
||||
|
@ -53,9 +54,9 @@
|
|||
#define SB_BUF_SIZE 8096
|
||||
|
||||
enum {DSP_S_RESET,DSP_S_NORMAL,DSP_S_HIGHSPEED};
|
||||
enum SB_TYPES {SBT_NONE=0,SBT_1=1,SBT_PRO1=2,SBT_2=3,SBT_PRO2=4,SBT_16=6};
|
||||
enum SB_IRQS {SB_IRQ_8,SB_IRQ_16,SB_IRQ_MPU};
|
||||
|
||||
|
||||
enum DSP_MODES {
|
||||
MODE_NONE,MODE_DAC,
|
||||
MODE_SILENCE,
|
||||
|
@ -94,6 +95,8 @@ struct SB_INFO {
|
|||
Bit8u time_constant;
|
||||
bool use_time_constant;
|
||||
DSP_MODES mode;
|
||||
SB_TYPES type;
|
||||
OPL_Mode oplmode;
|
||||
struct {
|
||||
bool pending_8bit;
|
||||
bool pending_16bit;
|
||||
|
@ -907,9 +910,6 @@ static Bit8u read_sb(Bit32u port) {
|
|||
return 0xff;
|
||||
}
|
||||
return 0xff;
|
||||
/* For now loop FM Stuff to 0x388 */
|
||||
case 0x00: case 0x02: case 0x08:
|
||||
return IO_Read(0x388);
|
||||
case DSP_RESET:
|
||||
return 0xff;
|
||||
default:
|
||||
|
@ -933,14 +933,6 @@ static void write_sb(Bit32u port,Bit8u val) {
|
|||
case MIXER_DATA:
|
||||
MIXER_Write(val);
|
||||
break;
|
||||
/* For now loop FM Stuff to 0x388 */
|
||||
case 0x00: case 0x02: case 0x08:
|
||||
IO_Write(0x388,val);
|
||||
break;
|
||||
case 0x01: case 0x03: case 0x09:
|
||||
IO_Write(0x389,val);
|
||||
break;
|
||||
|
||||
default:
|
||||
LOG(LOG_SB,LOG_NORMAL)("Unhandled write to SB Port %4X",port);
|
||||
break;
|
||||
|
@ -964,7 +956,48 @@ static void SBLASTER_CallBack(Bit8u * stream,Bit32u len) {
|
|||
void SBLASTER_Init(Section* sec) {
|
||||
Bitu i;
|
||||
Section_prop * section=static_cast<Section_prop *>(sec);
|
||||
if(!section->Get_bool("sblaster")) return;
|
||||
const char * sbtype=section->Get_string("type");
|
||||
if (!strcasecmp(sbtype,"sb1")) sb.type=SBT_1;
|
||||
else if (!strcasecmp(sbtype,"sb2")) sb.type=SBT_2;
|
||||
else if (!strcasecmp(sbtype,"sbpro1")) sb.type=SBT_PRO1;
|
||||
else if (!strcasecmp(sbtype,"sbpro2")) sb.type=SBT_PRO2;
|
||||
else if (!strcasecmp(sbtype,"sb16")) sb.type=SBT_16;
|
||||
else if (!strcasecmp(sbtype,"none")) sb.type=SBT_NONE;
|
||||
else sb.type=SBT_16;
|
||||
|
||||
/* OPL/CMS Init */
|
||||
const char * omode=section->Get_string("oplmode");
|
||||
Bitu oplrate=section->Get_int("oplrate");
|
||||
OPL_Mode opl_mode;
|
||||
if (!strcasecmp(omode,"none")) opl_mode=OPL_none;
|
||||
else if (!strcasecmp(omode,"cms")) opl_mode=OPL_cms;
|
||||
else if (!strcasecmp(omode,"opl2")) opl_mode=OPL_opl2;
|
||||
else if (!strcasecmp(omode,"dualopl2")) opl_mode=OPL_dualopl2;
|
||||
else if (!strcasecmp(omode,"opl3")) opl_mode=OPL_opl3;
|
||||
/* Else assume auto */
|
||||
else {
|
||||
switch (sb.type) {
|
||||
case SBT_NONE:opl_mode=OPL_none;break;
|
||||
case SBT_1:opl_mode=OPL_cms;break;
|
||||
case SBT_2:opl_mode=OPL_opl2;break;
|
||||
case SBT_PRO1:opl_mode=OPL_dualopl2;break;
|
||||
case SBT_PRO2:
|
||||
case SBT_16:
|
||||
opl_mode=OPL_opl3;break;
|
||||
}
|
||||
}
|
||||
switch (opl_mode) {
|
||||
case OPL_none:
|
||||
break;
|
||||
case OPL_cms:
|
||||
CMS_Init(section,oplrate);
|
||||
break;
|
||||
case OPL_opl2:
|
||||
case OPL_dualopl2:
|
||||
case OPL_opl3:
|
||||
OPL_Init(section,opl_mode,oplrate);
|
||||
break;
|
||||
}
|
||||
sb.chan=MIXER_AddChannel(&SBLASTER_CallBack,22050,"SBLASTER");
|
||||
MIXER_Enable(sb.chan,false);
|
||||
sb.dsp.state=DSP_S_NORMAL;
|
||||
|
@ -982,6 +1015,6 @@ void SBLASTER_Init(Section* sec) {
|
|||
}
|
||||
PIC_RegisterIRQ(sb.hw.irq,0,"SB");
|
||||
DSP_Reset();
|
||||
|
||||
SHELL_AddAutoexec("SET BLASTER=A%3X I%d D%d T4",sb.hw.base,sb.hw.irq,sb.hw.dma8);
|
||||
SHELL_AddAutoexec("SET BLASTER=A%3X I%d D%d T%d",sb.hw.base,sb.hw.irq,sb.hw.dma8,sb.type);
|
||||
}
|
||||
|
||||
|
|
2778
src/hardware/ymf262.c
Normal file
2778
src/hardware/ymf262.c
Normal file
File diff suppressed because it is too large
Load diff
53
src/hardware/ymf262.h
Normal file
53
src/hardware/ymf262.h
Normal file
|
@ -0,0 +1,53 @@
|
|||
#ifndef YMF262_H
|
||||
#define YMF262_H
|
||||
|
||||
|
||||
#define BUILD_YMF262 (HAS_YMF262)
|
||||
|
||||
|
||||
/* select number of output bits: 8 or 16 */
|
||||
#define OPL3_SAMPLE_BITS 16
|
||||
|
||||
/* compiler dependence */
|
||||
#ifndef OSD_CPU_H
|
||||
#define OSD_CPU_H
|
||||
typedef unsigned char UINT8; /* unsigned 8bit */
|
||||
typedef unsigned short UINT16; /* unsigned 16bit */
|
||||
typedef unsigned int UINT32; /* unsigned 32bit */
|
||||
typedef signed char INT8; /* signed 8bit */
|
||||
typedef signed short INT16; /* signed 16bit */
|
||||
typedef signed int INT32; /* signed 32bit */
|
||||
#endif
|
||||
|
||||
#if (OPL3_SAMPLE_BITS==16)
|
||||
typedef INT16 OPL3SAMPLE;
|
||||
#endif
|
||||
#if (OPL3_SAMPLE_BITS==8)
|
||||
typedef INT8 OPL3SAMPLE;
|
||||
#endif
|
||||
|
||||
|
||||
typedef void (*OPL3_TIMERHANDLER)(int channel,double interval_Sec);
|
||||
typedef void (*OPL3_IRQHANDLER)(int param,int irq);
|
||||
typedef void (*OPL3_UPDATEHANDLER)(int param,int min_interval_us);
|
||||
|
||||
|
||||
|
||||
#if BUILD_YMF262
|
||||
|
||||
int YMF262Init(int num, int clock, int rate);
|
||||
void YMF262Shutdown(void);
|
||||
void YMF262ResetChip(int which);
|
||||
int YMF262Write(int which, int a, int v);
|
||||
unsigned char YMF262Read(int which, int a);
|
||||
int YMF262TimerOver(int which, int c);
|
||||
void YMF262UpdateOne(int which, INT16 **buffers, int length);
|
||||
|
||||
void YMF262SetTimerHandler(int which, OPL3_TIMERHANDLER TimerHandler, int channelOffset);
|
||||
void YMF262SetIRQHandler(int which, OPL3_IRQHANDLER IRQHandler, int param);
|
||||
void YMF262SetUpdateHandler(int which, OPL3_UPDATEHANDLER UpdateHandler, int param);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* YMF262_H */
|
Loading…
Add table
Reference in a new issue