Added dual opl2 and opl3 emulation.
Fixed the sample rate config option not being used. Added different soundblaster type options. Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1699
This commit is contained in:
Sjoerd van der Berg
parent
30e64fda9b
commit
9d26cef41c
8 changed files with 3168 additions and 251 deletions
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@ -29,9 +29,7 @@
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Thanks to vdmsound for nice simple way to implement this
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*/
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namespace MAME {
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/* Defines */
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# define logerror(x)
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# define logerror
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#ifdef _MSC_VER
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/* Disable recurring warnings */
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@ -39,166 +37,137 @@ namespace MAME {
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# pragma warning ( disable : 4244 )
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#endif
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/* Work around ANSI compliance problem (see driver.h) */
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struct __MALLOCPTR {
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void* m_ptr;
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struct __MALLOCPTR {
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void* m_ptr;
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__MALLOCPTR(void) : m_ptr(NULL) { }
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__MALLOCPTR(void* src) : m_ptr(src) { }
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void* operator=(void* rhs) { return (m_ptr = rhs); }
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operator int*() const { return (int*)m_ptr; }
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operator int**() const { return (int**)m_ptr; }
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operator char*() const { return (char*)m_ptr; }
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};
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/* Bring in the MAME OPL emulation */
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# define HAS_YM3812 1
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# include "fmopl.c"
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}
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struct OPLTimer_t {
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bool isEnabled;
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bool isMasked;
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bool isOverflowed;
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Bit64u count;
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Bit64u base;
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__MALLOCPTR(void) : m_ptr(NULL) { }
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__MALLOCPTR(void* src) : m_ptr(src) { }
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void* operator=(void* rhs) { return (m_ptr = rhs); }
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operator int*() const { return (int*)m_ptr; }
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operator int**() const { return (int**)m_ptr; }
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operator char*() const { return (char*)m_ptr; }
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};
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static OPLTimer_t timer1,timer2;
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static Bit8u regsel;
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namespace OPL2 {
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#define HAS_YM3812 1
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#include "fmopl.c"
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void TimerOver(Bitu val){
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YM3812TimerOver(val>>8,val & 0xff);
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}
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void TimerHandler(int channel,double interval_Sec) {
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PIC_AddEvent(TimerOver,1000000*interval_Sec,channel);
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}
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}
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#undef OSD_CPU_H
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#undef TL_TAB_LEN
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namespace OPL3 {
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#define HAS_YMF262 1
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#include "ymf262.c"
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void TimerOver(Bitu val){
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YMF262TimerOver(val>>8,val & 0xff);
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}
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void TimerHandler(int channel,double interval_Sec) {
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PIC_AddEvent(TimerOver,1000000*interval_Sec,channel);
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}
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}
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#define OPL_INTERNAL_FREQ 3600000 // The OPL operates at 3.6MHz
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#define OPL_NUM_CHIPS 1 // Number of OPL chips
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#define OPL_CHIP0 0
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#define OPL2_INTERNAL_FREQ 3600000 // The OPL2 operates at 3.6MHz
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#define OPL3_INTERNAL_FREQ 14400000 // The OPL3 operates at 14.4MHz
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static MIXER_Channel * adlib_chan;
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static struct {
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bool active;
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OPL_Mode mode;
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MIXER_Channel * chan;
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Bit32u last_used;
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Bit16s mixbuf[2][128];
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} opl;
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static void ADLIB_CallBack(Bit8u *stream, Bit32u len) {
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static void OPL_CallBack(Bit8u *stream, Bit32u len) {
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/* Check for size to update and check for 1 ms updates to the opl registers */
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/* Calculate teh machine ms we are at now */
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/* update 1 ms of data */
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MAME::YM3812UpdateOne(0,(MAME::INT16 *)stream,len);
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}
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Bitu i;
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switch(opl.mode) {
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case OPL_opl2:
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OPL2::YM3812UpdateOne(0,(OPL2::INT16 *)stream,len);
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break;
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case OPL_opl3:
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OPL3::YMF262UpdateOne(0,(OPL2::INT16 *)stream,len);
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break;
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case OPL_dualopl2:
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OPL2::YM3812UpdateOne(0,(OPL2::INT16 *)opl.mixbuf[0],len);
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OPL2::YM3812UpdateOne(1,(OPL2::INT16 *)opl.mixbuf[1],len);
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for (i=0;i<len;i++) {
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((Bit16u *)stream)[i*2+0]=opl.mixbuf[0][i];
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((Bit16u *)stream)[i*2+1]=opl.mixbuf[1][i];
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}
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break;
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static Bit8u read_p388(Bit32u port) {
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Bit8u ret=0;
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Bit64u micro=PIC_MicroCount();
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if (timer1.isEnabled) {
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if ((micro-timer1.base)>timer1.count) {
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timer1.isOverflowed=true;
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timer1.base=micro;
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}
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if (timer1.isOverflowed || !timer1.isMasked) {
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ret|=0xc0;
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}
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}
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if (timer2.isEnabled) {
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if ((micro-timer2.base)>timer2.count) {
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timer2.isOverflowed=true;
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timer2.base=micro;
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}
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if (timer2.isOverflowed || !timer2.isMasked) {
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ret|=0xA0;
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}
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}
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return ret;
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}
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static void write_p388(Bit32u port,Bit8u val) {
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regsel=val;
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// The following writes this value to ultrasounds equivalent register.
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// I don't know of any other way to do this
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IO_Write(0x248,val);
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}
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static void write_p389(Bit32u port,Bit8u val) {
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switch (regsel) {
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case 0x02: /* Timer 1 */
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timer1.count=val*80;
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return;
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case 0x03: /* Timer 2 */
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timer2.count=val*320;
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return;
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case 0x04: /* IRQ clear / mask and Timer enable */
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if (val&0x80) {
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timer1.isOverflowed=false;
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timer2.isOverflowed=false;
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return;
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}
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if (val&0x40) timer1.isMasked=true;
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else timer1.isMasked=false;
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if (val&1) {
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timer1.isEnabled=true;
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timer1.base=PIC_MicroCount();
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} else timer1.isEnabled=false;
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if (val&0x20) timer2.isMasked=true;
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else timer2.isMasked=false;
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if (val&2) {
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timer2.isEnabled=true;
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timer2.base=PIC_MicroCount();
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} else timer2.isEnabled=false;
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return;
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default: /* Normal OPL call queue it */
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/* Use a little hack to directly write to the register */
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MAME::OPLWriteReg(MAME::OPL_YM3812[0],regsel,val);
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if ((PIC_Ticks-opl.last_used)>1000) {
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MIXER_Enable(opl.chan,false);
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opl.active=false;
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}
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}
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static bool adlib_enabled;
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Bit8u OPL_Read(Bit32u port) {
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Bitu addr=port & 3;
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switch (opl.mode) {
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case OPL_opl2:
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return OPL2::YM3812Read(0,addr);
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case OPL_dualopl2:
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return OPL2::YM3812Read(addr>>1,addr);
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case OPL_opl3:
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return OPL3::YMF262Read(0,addr);
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}
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return 0xff;
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}
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static void ADLIB_Enable(bool enable) {
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if (enable) {
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adlib_enabled=true;
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MIXER_Enable(adlib_chan,true);
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IO_RegisterWriteHandler(0x388,write_p388,"ADLIB Register select");
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IO_RegisterWriteHandler(0x389,write_p389,"ADLIB Data Write");
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IO_RegisterReadHandler(0x388,read_p388,"ADLIB Status");
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IO_RegisterWriteHandler(0x220,write_p388,"ADLIB Register select");
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IO_RegisterWriteHandler(0x221,write_p389,"ADLIB Data Write");
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IO_RegisterReadHandler(0x220,read_p388,"ADLIB Status");
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} else {
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adlib_enabled=false;
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MIXER_Enable(adlib_chan,false);
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IO_FreeWriteHandler(0x220);
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IO_FreeWriteHandler(0x221);
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IO_FreeReadHandler(0x220);
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IO_FreeWriteHandler(0x388);
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IO_FreeWriteHandler(0x389);
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IO_FreeReadHandler(0x388);
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void OPL_Write(Bit32u port,Bit8u val) {
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opl.last_used=PIC_Ticks;
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if (!opl.active) {
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opl.active=true;
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MIXER_Enable(opl.chan,true);
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}
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Bitu addr=port & 3;
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switch (opl.mode) {
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case OPL_opl2:
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OPL2::YM3812Write(0,addr,val);
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break;
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case OPL_opl3:
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OPL3::YMF262Write(0,addr,val);
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break;
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case OPL_dualopl2:
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OPL2::YM3812Write(addr>>1,addr,val);
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break;
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}
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}
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void ADLIB_Init(Section* sec) {
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void OPL_Init(Section* sec,OPL_Mode oplmode,Bitu rate) {
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Bitu i;
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Section_prop * section=static_cast<Section_prop *>(sec);
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if(!section->Get_bool("adlib")) return;
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timer1.isMasked=true;
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timer1.base=0;
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timer1.count=0;
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timer1.isEnabled=false;
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timer1.isOverflowed=false;
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timer2.isMasked=true;
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timer2.base=0;
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timer2.count=0;
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timer2.isEnabled=false;
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timer2.isOverflowed=false;
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#define ADLIB_FREQ 22050
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if (MAME::YM3812Init(OPL_NUM_CHIPS,OPL_INTERNAL_FREQ,ADLIB_FREQ)) {
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E_Exit("Can't create adlib OPL Emulator");
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if (OPL2::YM3812Init(2,OPL2_INTERNAL_FREQ,rate)) {
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E_Exit("Can't create OPL2 Emulator");
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};
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OPL2::YM3812SetTimerHandler(0,OPL2::TimerHandler,0);
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OPL2::YM3812SetTimerHandler(1,OPL2::TimerHandler,256);
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if (OPL3::YMF262Init(1,OPL3_INTERNAL_FREQ,rate)) {
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E_Exit("Can't create OPL3 Emulator");
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};
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OPL3::YMF262SetTimerHandler(0,OPL3::TimerHandler,0);
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for (i=0;i<4;i++) {
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IO_RegisterWriteHandler(0x388+i,OPL_Write,"OPL Write");
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IO_RegisterReadHandler(0x388+i,OPL_Read,"OPL read");
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IO_RegisterWriteHandler(0x220+i,OPL_Write,"OPL Write");
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IO_RegisterReadHandler(0x220+i,OPL_Read,"OPL read");
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}
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opl.active=false;
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opl.last_used=0;
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opl.mode=oplmode;
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adlib_chan=MIXER_AddChannel(ADLIB_CallBack,ADLIB_FREQ,"ADLIB");
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MIXER_SetMode(adlib_chan,MIXER_16MONO);
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ADLIB_Enable(true);
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opl.chan=MIXER_AddChannel(OPL_CallBack,rate,"ADLIB");
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MIXER_SetMode(opl.chan,(opl.mode>OPL_opl2) ? MIXER_16STEREO : MIXER_16MONO);
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MIXER_Enable(opl.chan,false);
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};
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