some s3/xga fixes (hal)
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3193
This commit is contained in:
Sebastian Strohhäcker
parent
c78a9f6c03
commit
b374d8c93f
4 changed files with 77 additions and 47 deletions
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: vga.h,v 1.42 2008-05-28 20:43:13 qbix79 Exp $ */
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/* $Id: vga.h,v 1.43 2008-08-08 21:56:36 c2woody Exp $ */
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#ifndef DOSBOX_VGA_H
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#define DOSBOX_VGA_H
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@ -55,6 +55,18 @@ enum VGAModes {
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#define S3_CLOCK(_M,_N,_R) ((S3_CLOCK_REF * ((_M) + 2)) / (((_N) + 2) * (1 << (_R))))
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#define S3_MAX_CLOCK 150000 /* KHz */
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#define S3_XGA_1024 0x00
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#define S3_XGA_1152 0x01
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#define S3_XGA_640 0x40
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#define S3_XGA_800 0x80
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#define S3_XGA_1280 0xc0
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#define S3_XGA_WMASK (S3_XGA_640|S3_XGA_800|S3_XGA_1024|S3_XGA_1152|S3_XGA_1280)
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#define S3_XGA_8BPP 0x00
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#define S3_XGA_16BPP 0x10
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#define S3_XGA_32BPP 0x30
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#define S3_XGA_CMASK (S3_XGA_8BPP|S3_XGA_16BPP|S3_XGA_32BPP)
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typedef struct {
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bool attrindex;
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} VGA_Internal;
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@ -179,6 +191,8 @@ typedef struct {
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Bit16u la_window;
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Bit8u misc_control_2;
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Bit8u ext_mem_ctrl;
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Bitu xga_screen_width;
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VGAModes xga_color_mode;
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struct {
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Bit8u r;
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Bit8u n;
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: vga_s3.cpp,v 1.15 2008-08-04 17:48:36 c2woody Exp $ */
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/* $Id: vga_s3.cpp,v 1.16 2008-08-08 21:57:00 c2woody Exp $ */
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#include "dosbox.h"
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#include "inout.h"
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@ -140,6 +140,19 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
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break;
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case 0x50: // Extended System Control 1
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vga.s3.reg_50 = val;
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switch (val & S3_XGA_CMASK) {
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case S3_XGA_32BPP: vga.s3.xga_color_mode = M_LIN32; break;
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case S3_XGA_16BPP: vga.s3.xga_color_mode = M_LIN16; break;
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case S3_XGA_8BPP: vga.s3.xga_color_mode = M_LIN8; break;
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}
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switch (val & S3_XGA_WMASK) {
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case S3_XGA_1024: vga.s3.xga_screen_width = 1024; break;
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case S3_XGA_1152: vga.s3.xga_screen_width = 1152; break;
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case S3_XGA_640: vga.s3.xga_screen_width = 640; break;
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case S3_XGA_800: vga.s3.xga_screen_width = 800; break;
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case S3_XGA_1280: vga.s3.xga_screen_width = 1280; break;
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default: vga.s3.xga_screen_width = 1024; break;
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}
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break;
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case 0x51: /* Extended System Control 2 */
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vga.s3.reg_51=val & 0xc0; //Only store bits 6,7
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@ -297,6 +310,11 @@ void SVGA_S3_WriteCRTC(Bitu reg,Bitu val,Bitu iolen) {
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/*
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0 VCLK PHS. VCLK Phase With Respect to DCLK. If clear VLKC is inverted
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DCLK, if set VCLK = DCLK.
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2-3 (Trio64V+) streams mode
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00 disable Streams Processor
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01 overlay secondary stream on VGA-mode background
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10 reserved
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11 full Streams Processor operation
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4-7 Pixel format.
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0 Mode 0: 8bit (1 pixel/VCLK)
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1 Mode 8: 8bit (2 pixels/VCLK)
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@ -377,6 +395,10 @@ Bitu SVGA_S3_ReadCRTC( Bitu reg, Bitu iolen) {
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return vga.s3.hgc.originy>>8;
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case 0x49: /* HGC orgY */
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return vga.s3.hgc.originy&0xff;
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case 0x4A: /* HGC foreground stack */
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return vga.s3.hgc.forestack[vga.s3.hgc.fstackpos];
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case 0x4B: /* HGC background stack */
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return vga.s3.hgc.backstack[vga.s3.hgc.bstackpos];
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case 0x50: // CR50 Extended System Control 1
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return vga.s3.reg_50;
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case 0x51: /* Extended System Control 2 */
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: vga_xga.cpp,v 1.13 2008-08-06 18:32:35 c2woody Exp $ */
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/* $Id: vga_xga.cpp,v 1.14 2008-08-08 21:57:00 c2woody Exp $ */
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#include <string.h>
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#include "dosbox.h"
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@ -27,7 +27,8 @@
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#include "callback.h"
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#include "cpu.h" // for 0x3da delay
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#define XGA_SCREEN_WIDTH vga.draw.width
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#define XGA_SCREEN_WIDTH vga.s3.xga_screen_width
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#define XGA_COLOR_MODE vga.s3.xga_color_mode
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#define XGA_SHOW_COMMAND_TRACE 0
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@ -140,7 +141,7 @@ void XGA_DrawPoint(Bitu x, Bitu y, Bitu c) {
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/* Need to zero out all unused bits in modes that have any (15-bit or "32"-bit -- the last
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one is actually 24-bit. Without this step there may be some graphics corruption (mainly,
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during windows dragging. */
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switch(vga.mode) {
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switch(XGA_COLOR_MODE) {
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case M_LIN8: vga.mem.linear[memaddr] = c; break;
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case M_LIN15: ((Bit16u*)(vga.mem.linear))[memaddr] = (Bit16u)(c&0x7fff); break;
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case M_LIN16: ((Bit16u*)(vga.mem.linear))[memaddr] = (Bit16u)(c&0xffff); break;
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@ -156,7 +157,7 @@ Bitu XGA_GetPoint(Bitu x, Bitu y) {
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//LOG_MSG("getpoint mem over: x%d y%d",x,y);
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return 0;
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}
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switch(vga.mode) {
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switch(XGA_COLOR_MODE) {
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case M_LIN8: return vga.mem.linear[memaddr];
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case M_LIN15:
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case M_LIN16: return ((Bit16u*)(vga.mem.linear))[memaddr];
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@ -954,40 +955,35 @@ void XGA_DrawCmd(Bitu val, Bitu len) {
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}
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void XGA_SetDualReg(Bit32u& reg, Bitu val) {
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switch(vga.mode) {
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switch(XGA_COLOR_MODE) {
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case M_LIN8:
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reg = (Bit8u)(val&0xff); break;
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case M_LIN15:
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case M_LIN16:
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reg = (Bit16u)(val&0xffff); break;
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case M_LIN32: {
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if(xga.control1 & 0x200)
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reg = val;
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else if(xga.control1 & 0x10)
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reg = (reg&0x0000ffff)|(val<<16);
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else
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reg = (reg&0xffff0000)|(val&0x0000ffff);
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xga.control1 ^= 0x10;
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}
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case M_LIN32:
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if (xga.control1 & 0x200)
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reg = val;
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else if (xga.control1 & 0x10)
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reg = (reg&0x0000ffff)|(val<<16);
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else
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reg = (reg&0xffff0000)|(val&0x0000ffff);
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xga.control1 ^= 0x10;
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break;
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}
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}
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Bitu XGA_GetDualReg(Bit32u reg) {
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switch(vga.mode) {
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switch(XGA_COLOR_MODE) {
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case M_LIN8:
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return (Bit8u)(reg&0xff);
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case M_LIN15: case M_LIN16:
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return (Bit16u)(reg&0xffff);
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case M_LIN32: {
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if(xga.control1 & 0x200)
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return reg;
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xga.control1 ^= 0x10;
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if(xga.control1 & 0x10)
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return reg&0x0000ffff;
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else
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return reg>>16;
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}
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case M_LIN32:
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if (xga.control1 & 0x200) return reg;
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xga.control1 ^= 0x10;
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if (xga.control1 & 0x10) return reg&0x0000ffff;
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else return reg>>16;
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}
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return 0;
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}
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@ -1027,24 +1023,20 @@ void XGA_Write(Bitu port, Bitu val, Bitu len) {
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break;
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case 0x8120: // packed MMIO: DWORD background color (see PORT A2E8h)
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//if(len==4) xga.backcolor = val;
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//else
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XGA_SetDualReg(xga.backcolor, val);
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if (len==4) xga.backcolor = val;
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else XGA_SetDualReg(xga.backcolor, val);
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break;
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case 0x8124: // packed MMIO: DWORD foreground color (see PORT A6E8h)
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//if(len==4) xga.forecolor = val; // TODO
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//else
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XGA_SetDualReg(xga.forecolor, val);
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if (len==4) xga.forecolor = val; // TODO
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else XGA_SetDualReg(xga.forecolor, val);
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break;
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case 0x8128: // DWORD write mask (see PORT AAE8h)
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//if(len==4) xga.writemask = val;
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//else
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XGA_SetDualReg(xga.writemask, val);
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if (len==4) xga.writemask = val;
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else XGA_SetDualReg(xga.writemask, val);
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break;
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case 0x812C: // DWORD read mask (see PORT AEE8h)
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//if(len==4) xga.readmask = val;
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//else
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XGA_SetDualReg(xga.readmask, val);
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if (len==4) xga.readmask = val;
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else XGA_SetDualReg(xga.readmask, val);
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break;
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case 0x8134: // packed MMIO: DWORD background mix (low word) and
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// foreground mix (high word) (see PORT B6E8h,PORT BAE8h)
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: int10_modes.cpp,v 1.79 2008-08-06 18:32:35 c2woody Exp $ */
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/* $Id: int10_modes.cpp,v 1.80 2008-08-08 21:57:00 c2woody Exp $ */
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#include <string.h>
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@ -1206,18 +1206,20 @@ dac_text16:
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IO_Write(0x3c5,0x03);
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// Accellerator setup
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Bitu reg_50=0;
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Bitu reg_50=S3_XGA_8BPP;
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switch (CurMode->type) {
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case M_LIN15:
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case M_LIN16: reg_50|=0x10; break;
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case M_LIN32: reg_50|=0x30; break;
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case M_LIN16: reg_50|=S3_XGA_16BPP; break;
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case M_LIN32: reg_50|=S3_XGA_32BPP; break;
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default: break;
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}
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switch(CurMode->swidth) {
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case 640: reg_50|=0x40; break;
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case 800: reg_50|=0x80; break;
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case 1024: break;
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case 1152: reg_50|=0x01; break;
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case 1280: reg_50|=0xc1; break;
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case 640: reg_50|=S3_XGA_640; break;
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case 800: reg_50|=S3_XGA_800; break;
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case 1024: reg_50|=S3_XGA_1024; break;
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case 1152: reg_50|=S3_XGA_1152; break;
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case 1280: reg_50|=S3_XGA_1280; break;
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default: break;
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}
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IO_WriteB(crtc_base,0x50); IO_WriteB(crtc_base+1,reg_50);
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