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cpu updates (privileged instructions, trapflag handling)

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Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@2275
This commit is contained in:
Sebastian Strohhäcker 2005-08-15 13:43:44 +00:00
parent 85850ccc22
commit b48eceebe7
12 changed files with 1352 additions and 109 deletions
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8
src/cpu/core_full/load.h
View file

@ -472,12 +472,18 @@ l_M_Ed:
CPU_CPUID();
goto nextopcode;
case D_HLT:
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
FillFlags();
CPU_HLT(GetIP());
return CBRET_NONE;
case D_CLTS:
//TODO Really clear it sometime
if (cpu.pmode && cpu.cpl) goto illegalopcode;
cpu.cr0&=(~CR0_TASKSWITCH);
goto nextopcode;
case D_ICEBP:
FillFlags();
CPU_SW_Interrupt_NoIOPLCheck(1,GetIP());
continue;
default:
LOG(LOG_CPU,LOG_ERROR)("LOAD:Unhandled code %d opcode %X",inst.code.load,inst.entry);
goto illegalopcode;

18
src/cpu/core_full/op.h
View file

@ -376,6 +376,7 @@ switch (inst.code.op) {
return inst.op1.d;
case O_GRP6w:
case O_GRP6d:
if ((reg_flags & FLAG_VM) || (!cpu.pmode)) goto illegalopcode;
switch (inst.rm_index) {
case 0x00: /* SLDT */
{
@ -392,10 +393,12 @@ switch (inst.code.op) {
}
break;
case 0x02: /* LLDT */
CPU_LLDT(inst.op1.d);
if (cpu.cpl) EXCEPTION(EXCEPTION_GP);
if (CPU_LLDT(inst.op1.d)) RunException();
goto nextopcode; /* Else value will saved */
case 0x03: /* LTR */
CPU_LTR(inst.op1.d);
if (cpu.cpl) EXCEPTION(EXCEPTION_GP);
if (CPU_LTR(inst.op1.d)) RunException();
goto nextopcode; /* Else value will saved */
case 0x04: /* VERR */
FillFlags();
@ -407,6 +410,7 @@ switch (inst.code.op) {
goto nextopcode; /* Else value will saved */
default:
LOG(LOG_CPU,LOG_ERROR)("Group 6 Illegal subfunction %X",inst.rm_index);
goto illegalopcode;
}
break;
case O_GRP7w:
@ -429,9 +433,11 @@ switch (inst.code.op) {
goto nextopcode;
}
case 2: /* LGDT */
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
CPU_LGDT(LoadMw(inst.rm_eaa),LoadMd(inst.rm_eaa+2)&((inst.code.op == O_GRP7w) ? 0xFFFFFF : 0xFFFFFFFF));
goto nextopcode;
case 3: /* LIDT */
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
CPU_LIDT(LoadMw(inst.rm_eaa),LoadMd(inst.rm_eaa+2)&((inst.code.op == O_GRP7w) ? 0xFFFFFF : 0xFFFFFFFF));
goto nextopcode;
case 4: /* SMSW */
@ -446,6 +452,7 @@ switch (inst.code.op) {
goto nextopcode;
default:
LOG(LOG_CPU,LOG_ERROR)("Group 7 Illegal subfunction %X",inst.rm_index);
goto illegalopcode;
}
break;
case O_M_CRx_Rd:
@ -455,14 +462,14 @@ switch (inst.code.op) {
if (CPU_READ_CRX(inst.rm_index,inst.op1.d)) RunException();
break;
case O_M_DRx_Rd:
// LOG(LOG_CPU,LOG_NORMAL)("MOV DR%d,%X",inst.rm_index,inst.op1.d);
if (CPU_WRITE_DRX(inst.rm_index,inst.op1.d)) RunException();
break;
case O_M_Rd_DRx:
inst.op1.d=0;
// LOG(LOG_CPU,LOG_NORMAL)("MOV %X,DR%d",inst.op1.d,inst.rm_index);
if (CPU_READ_DRX(inst.rm_index,inst.op1.d)) RunException();
break;
case O_LAR:
{
if ((reg_flags & FLAG_VM) || (!cpu.pmode)) goto illegalopcode;
FillFlags();
Bitu ar=inst.op2.d;
CPU_LAR(inst.op1.w,ar);
@ -471,6 +478,7 @@ switch (inst.code.op) {
break;
case O_LSL:
{
if ((reg_flags & FLAG_VM) || (!cpu.pmode)) goto illegalopcode;
FillFlags();
Bitu limit=inst.op2.d;
CPU_LSL(inst.op1.w,limit);

4
src/cpu/core_full/optable.h
View file

@ -171,7 +171,7 @@ static OpCode OpCodeTable[1024]={
{L_REGw ,O_OUTb ,0 ,REGI_DX},{L_REGw ,O_OUTw ,0 ,REGI_DX},
/* 0xf0 - 0xf7 */
{D_LOCK ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
{D_LOCK ,0 ,0 ,0 },{D_ICEBP ,0 ,0 ,0 },
{L_PREREPNE ,0 ,0 ,0 },{L_PREREP ,0 ,0 ,0 },
{D_HLT ,0 ,0 ,0 },{D_CMC ,0 ,0 ,0 },
{L_MODRM ,8 ,0 ,M_GRP },{L_MODRM ,9 ,0 ,M_GRP },
@ -526,7 +526,7 @@ static OpCode OpCodeTable[1024]={
{L_REGw ,O_OUTb ,0 ,REGI_DX},{L_REGw ,O_OUTd ,0 ,REGI_DX},
/* 0x2f0 - 0x2f7 */
{D_LOCK ,0 ,0 ,0 },{0 ,0 ,0 ,0 },
{D_LOCK ,0 ,0 ,0 },{D_ICEBP ,0 ,0 ,0 },
{L_PREREPNE ,0 ,0 ,0 },{L_PREREP ,0 ,0 ,0 },
{0 ,0 ,0 ,0 },{D_CMC ,0 ,0 ,0 },
{L_MODRM ,8 ,0 ,M_GRP },{L_MODRM ,0xa ,0 ,M_GRP },

2
src/cpu/core_full/support.h
View file

@ -45,7 +45,7 @@ enum {
D_SAHF,D_LAHF,
D_CPUID,
D_HLT,D_CLTS,
D_LOCK,
D_LOCK,D_ICEBP,
L_ERROR,
};

3
src/cpu/core_normal.cpp
View file

@ -188,13 +188,12 @@ decode_end:
}
Bits CPU_Core_Normal_Trap_Run(void) {
Bits oldCycles = CPU_Cycles;
CPU_Cycles = 1;
core.trap.skip=false;
Bits ret=CPU_Core_Normal_Run();
if (!core.trap.skip) CPU_SW_Interrupt(1,reg_eip);
if (!core.trap.skip) CPU_HW_Interrupt(1);
CPU_Cycles = oldCycles-1;
cpudecoder = &CPU_Core_Normal_Run;

72
src/cpu/core_normal/prefix_0f.h
View file

@ -18,6 +18,7 @@
CASE_0F_W(0x00) /* GRP 6 Exxx */
{
if ((reg_flags & FLAG_VM) || (!cpu.pmode)) goto illegal_opcode;
GetRM;Bitu which=(rm>>3)&7;
switch (which) {
case 0x00: /* SLDT */
@ -37,10 +38,20 @@
if (rm >= 0xc0 ) {GetEArw;loadval=*earw;}
else {GetEAa;loadval=LoadMw(eaa);}
switch (which) {
case 0x02:CPU_LLDT(loadval);break;
case 0x03:CPU_LTR(loadval);break;
case 0x04:CPU_VERR(loadval);break;
case 0x05:CPU_VERW(loadval);break;
case 0x02:
if (cpu.cpl) EXCEPTION(EXCEPTION_GP);
if (CPU_LLDT(loadval)) RUNEXCEPTION();
break;
case 0x03:
if (cpu.cpl) EXCEPTION(EXCEPTION_GP);
if (CPU_LTR(loadval)) RUNEXCEPTION();
break;
case 0x04:
CPU_VERR(loadval);
break;
case 0x05:
CPU_VERW(loadval);
break;
}
}
break;
@ -66,9 +77,11 @@
SaveMd(eaa+2,base);
break;
case 0x02: /* LGDT */
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
CPU_LGDT(LoadMw(eaa),LoadMd(eaa+2) & 0xFFFFFF);
break;
case 0x03: /* LIDT */
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
CPU_LIDT(LoadMw(eaa),LoadMd(eaa+2) & 0xFFFFFF);
break;
case 0x04: /* SMSW */
@ -83,6 +96,12 @@
} else {
GetEArw;Bitu limit;
switch (which) {
case 0x02: /* LGDT */
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
goto illegal_opcode;
case 0x03: /* LIDT */
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
goto illegal_opcode;
case 0x04: /* SMSW */
CPU_SMSW(limit);
*earw=limit;
@ -98,6 +117,7 @@
break;
CASE_0F_W(0x02) /* LAR Gw,Ew */
{
if ((reg_flags & FLAG_VM) || (!cpu.pmode)) goto illegal_opcode;
FillFlags();
GetRMrw;Bitu ar=*rmrw;
if (rm >= 0xc0) {
@ -110,6 +130,7 @@
break;
CASE_0F_W(0x03) /* LSL Gw,Ew */
{
if ((reg_flags & FLAG_VM) || (!cpu.pmode)) goto illegal_opcode;
FillFlags();
GetRMrw;Bitu limit=*rmrw;
if (rm >= 0xc0) {
@ -121,54 +142,59 @@
}
break;
CASE_0F_B(0x06) /* CLTS */
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
cpu.cr0&=(~CR0_TASKSWITCH);
break;
CASE_0F_B(0x20) /* MOV Rd.CRx */
{
GetRM;
Bitu which=(rm >> 3) & 7;
if (rm >= 0xc0 ) {
GetEArd;
Bit32u crx_value;
if (CPU_READ_CRX(which,crx_value)) RUNEXCEPTION();
*eard=crx_value;
} else {
GetEAa;
if (rm < 0xc0 ) {
rm |= 0xc0;
LOG(LOG_CPU,LOG_ERROR)("MOV XXX,CR%d with non-register",which);
}
GetEArd;
Bit32u crx_value;
if (CPU_READ_CRX(which,crx_value)) RUNEXCEPTION();
*eard=crx_value;
}
break;
CASE_0F_B(0x21) /* MOV Rd,DRx */
{
GetRM;
Bitu which=(rm >> 3) & 7;
if (rm >= 0xc0 ) {
GetEArd;
} else {
GetEAa;
if (rm < 0xc0 ) {
rm |= 0xc0;
LOG(LOG_CPU,LOG_ERROR)("MOV XXX,DR% with non-register",which);
}
GetEArd;
Bit32u drx_value;
if (CPU_READ_DRX(which,drx_value)) RUNEXCEPTION();
*eard=drx_value;
}
break;
CASE_0F_B(0x22) /* MOV CRx,Rd */
{
GetRM;
Bitu which=(rm >> 3) & 7;
if (rm >= 0xc0 ) {
GetEArd;
if (CPU_WRITE_CRX(which,*eard)) RUNEXCEPTION();
} else goto illegal_opcode;
if (rm < 0xc0 ) {
rm |= 0xc0;
LOG(LOG_CPU,LOG_ERROR)("MOV XXX,CR% with non-register",which);
}
GetEArd;
if (CPU_WRITE_CRX(which,*eard)) RUNEXCEPTION();
}
break;
CASE_0F_B(0x23) /* MOV DRx,Rd */
{
GetRM;
Bitu which=(rm >> 3) & 7;
if (rm >= 0xc0 ) {
GetEArd;
} else {
GetEAa;
if (rm < 0xc0 ) {
rm |= 0xc0;
LOG(LOG_CPU,LOG_ERROR)("MOV DR%,XXX with non-register",which);
}
GetEArd;
if (CPU_WRITE_DRX(which,*eard)) RUNEXCEPTION();
}
break;
CASE_0F_W(0x80) /* JO */

30
src/cpu/core_normal/prefix_66.h
View file

@ -331,8 +331,8 @@
case 0x05: /* MOV Ew,GS */
val=SegValue(gs);break;
default:
val=0;
E_Exit("CPU:8c:Illegal RM Byte");
LOG(LOG_CPU,LOG_ERROR)("CPU:8c:Illegal RM Byte");
goto illegal_opcode;
}
if (rm >= 0xc0 ) {GetEArd;*eard=val;}
else {GetEAa;SaveMw(eaa,val);}
@ -389,6 +389,12 @@
Bit32u newip=Fetchd();Bit16u newcs=Fetchw();
FillFlags();
CPU_CALL(true,newcs,newip,GETIP);
#if CPU_TRAP_CHECK
if (GETFLAG(TF)) {
cpudecoder=CPU_Core_Normal_Trap_Run;
return CBRET_NONE;
}
#endif
continue;
}
CASE_D(0x9c) /* PUSHFD */
@ -581,6 +587,12 @@
Bit16u newcs=Fetchw();
FillFlags();
CPU_JMP(true,newcs,newip,GETIP);
#if CPU_TRAP_CHECK
if (GETFLAG(TF)) {
cpudecoder=CPU_Core_Normal_Trap_Run;
return CBRET_NONE;
}
#endif
continue;
}
CASE_D(0xeb) /* JMP Jb */
@ -657,11 +669,18 @@
continue;
case 0x03: /* CALL FAR Ed */
{
if (rm >= 0xc0) goto illegal_opcode;
GetEAa;
Bit32u newip=LoadMd(eaa);
Bit16u newcs=LoadMw(eaa+4);
FillFlags();
CPU_CALL(true,newcs,newip,GETIP);
#if CPU_TRAP_CHECK
if (GETFLAG(TF)) {
cpudecoder=CPU_Core_Normal_Trap_Run;
return CBRET_NONE;
}
#endif
continue;
}
case 0x04: /* JMP NEAR Ed */
@ -670,11 +689,18 @@
continue;
case 0x05: /* JMP FAR Ed */
{
if (rm >= 0xc0) goto illegal_opcode;
GetEAa;
Bit32u newip=LoadMd(eaa);
Bit16u newcs=LoadMw(eaa+4);
FillFlags();
CPU_JMP(true,newcs,newip,GETIP);
#if CPU_TRAP_CHECK
if (GETFLAG(TF)) {
cpudecoder=CPU_Core_Normal_Trap_Run;
return CBRET_NONE;
}
#endif
continue;
}
break;

36
src/cpu/core_normal/prefix_66_0f.h
View file

@ -15,8 +15,10 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
CASE_0F_D(0x00) /* GRP 6 Exxx */
{
if ((reg_flags & FLAG_VM) || (!cpu.pmode)) goto illegal_opcode;
GetRM;Bitu which=(rm>>3)&7;
switch (which) {
case 0x00: /* SLDT */
@ -37,15 +39,26 @@
if (rm >= 0xc0 ) {GetEArw;loadval=*earw;}
else {GetEAa;loadval=LoadMw(eaa);}
switch (which) {
case 0x02:CPU_LLDT(loadval);break;
case 0x03:CPU_LTR(loadval);break;
case 0x04:CPU_VERR(loadval);break;
case 0x05:CPU_VERW(loadval);break;
case 0x02:
if (cpu.cpl) EXCEPTION(EXCEPTION_GP);
if (CPU_LLDT(loadval)) RUNEXCEPTION();
break;
case 0x03:
if (cpu.cpl) EXCEPTION(EXCEPTION_GP);
if (CPU_LTR(loadval)) RUNEXCEPTION();
break;
case 0x04:
CPU_VERR(loadval);
break;
case 0x05:
CPU_VERW(loadval);
break;
}
}
break;
default:
LOG(LOG_CPU,LOG_ERROR)("GRP6:Illegal call %2X",which);
goto illegal_opcode;
}
}
break;
@ -66,9 +79,11 @@
SaveMd(eaa+2,(Bit32u)base);
break;
case 0x02: /* LGDT */
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
CPU_LGDT(LoadMw(eaa),LoadMd(eaa+2));
break;
case 0x03: /* LIDT */
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
CPU_LIDT(LoadMw(eaa),LoadMd(eaa+2));
break;
case 0x04: /* SMSW */
@ -77,21 +92,28 @@
break;
case 0x06: /* LMSW */
limit=LoadMw(eaa);
if (!CPU_LMSW((Bit16u)limit)) goto decode_end;
if (CPU_LMSW((Bit16u)limit)) RUNEXCEPTION();
break;
}
} else {
GetEArd;Bitu limit;
switch (which) {
case 0x02: /* LGDT */
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
goto illegal_opcode;
case 0x03: /* LIDT */
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
goto illegal_opcode;
case 0x04: /* SMSW */
CPU_SMSW(limit);
*eard=(Bit32u)limit;
break;
case 0x06: /* LMSW */
if (!CPU_LMSW(*eard)) goto decode_end;
if (CPU_LMSW(*eard)) RUNEXCEPTION();
break;
default:
LOG(LOG_CPU,LOG_ERROR)("Illegal group 7 RM subfunction %d",which);
goto illegal_opcode;
break;
}
@ -100,6 +122,7 @@
break;
CASE_0F_D(0x02) /* LAR Gd,Ed */
{
if ((reg_flags & FLAG_VM) || (!cpu.pmode)) goto illegal_opcode;
FillFlags();
GetRMrd;Bitu ar=*rmrd;
if (rm >= 0xc0) {
@ -112,6 +135,7 @@
break;
CASE_0F_D(0x03) /* LSL Gd,Ew */
{
if ((reg_flags & FLAG_VM) || (!cpu.pmode)) goto illegal_opcode;
FillFlags();
GetRMrd;Bitu limit=*rmrd;
/* Just load 16-bit values for selectors */

46
src/cpu/core_normal/prefix_none.h
View file

@ -472,8 +472,8 @@
case 0x05: /* MOV Ew,GS */
val=SegValue(gs);break;
default:
val=0;
E_Exit("CPU:8c:Illegal RM Byte");
LOG(LOG_CPU,LOG_ERROR)("CPU:8c:Illegal RM Byte");
goto illegal_opcode;
}
if (rm >= 0xc0 ) {GetEArw;*earw=val;}
else {GetEAa;SaveMw(eaa,val);}
@ -551,6 +551,12 @@
FillFlags();
Bit16u newip=Fetchw();Bit16u newcs=Fetchw();
CPU_CALL(false,newcs,newip,GETIP);
#if CPU_TRAP_CHECK
if (GETFLAG(TF)) {
cpudecoder=CPU_Core_Normal_Trap_Run;
return CBRET_NONE;
}
#endif
continue;
}
CASE_B(0x9b) /* WAIT */
@ -727,7 +733,7 @@
if (DEBUG_Breakpoint())
return debugCallback;
#endif
CPU_SW_Interrupt(3,GETIP);
CPU_SW_Interrupt_NoIOPLCheck(3,GETIP);
#if CPU_TRAP_CHECK
core.trap.skip=true;
#endif
@ -761,14 +767,14 @@
{
FillFlags();
CPU_IRET(false,GETIP);
#if CPU_PIC_CHECK
if (GETFLAG(IF) && PIC_IRQCheck) return CBRET_NONE;
#endif
#if CPU_TRAP_CHECK
if (GETFLAG(TF)) {
cpudecoder=CPU_Core_Normal_Trap_Run;
return CBRET_NONE;
}
#endif
#if CPU_PIC_CHECK
if (GETFLAG(IF) && PIC_IRQCheck) return CBRET_NONE;
#endif
continue;
}
@ -900,6 +906,12 @@
Bit16u newcs=Fetchw();
FillFlags();
CPU_JMP(false,newcs,newip,GETIP);
#if CPU_TRAP_CHECK
if (GETFLAG(TF)) {
cpudecoder=CPU_Core_Normal_Trap_Run;
return CBRET_NONE;
}
#endif
continue;
}
CASE_W(0xeb) /* JMP Jb */
@ -928,6 +940,13 @@
CASE_B(0xf0) /* LOCK */
LOG(LOG_CPU,LOG_NORMAL)("CPU:LOCK"); /* FIXME: see case D_LOCK in core_full/load.h */
break;
CASE_B(0xf1) /* ICEBP */
FillFlags();
CPU_SW_Interrupt_NoIOPLCheck(1,GETIP);
#if CPU_TRAP_CHECK
core.trap.skip=true;
#endif
continue;
CASE_B(0xf2) /* REPNZ */
DO_PREFIX_REP(false);
break;
@ -935,6 +954,7 @@
DO_PREFIX_REP(true);
break;
CASE_B(0xf4) /* HLT */
if (cpu.pmode && cpu.cpl) EXCEPTION(EXCEPTION_GP);
FillFlags();
CPU_HLT(GETIP);
return CBRET_NONE; //Needs to return for hlt cpu core
@ -1094,11 +1114,18 @@
continue;
case 0x03: /* CALL Ep */
{
if (rm >= 0xc0) goto illegal_opcode;
GetEAa;
Bit16u newip=LoadMw(eaa);
Bit16u newcs=LoadMw(eaa+2);
FillFlags();
CPU_CALL(false,newcs,newip,GETIP);
#if CPU_TRAP_CHECK
if (GETFLAG(TF)) {
cpudecoder=CPU_Core_Normal_Trap_Run;
return CBRET_NONE;
}
#endif
continue;
}
break;
@ -1108,11 +1135,18 @@
continue;
case 0x05: /* JMP Ep */
{
if (rm >= 0xc0) goto illegal_opcode;
GetEAa;
Bit16u newip=LoadMw(eaa);
Bit16u newcs=LoadMw(eaa+2);
FillFlags();
CPU_JMP(false,newcs,newip,GETIP);
#if CPU_TRAP_CHECK
if (GETFLAG(TF)) {
cpudecoder=CPU_Core_Normal_Trap_Run;
return CBRET_NONE;
}
#endif
continue;
}
break;

1182
src/cpu/cpu.cpp
View file

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