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simplify memory checking handlers a bit

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Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3004
This commit is contained in:
Sebastian Strohhäcker 2007-09-30 14:10:08 +00:00
parent d0b4e12779
commit c6df37a834
4 changed files with 27 additions and 70 deletions
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25
src/cpu/core_dyn_x86/decoder.h
View file

@ -461,13 +461,8 @@ static void dyn_read_intro(DynReg * addr,bool release_addr=true) {
cache_addw(0xc18b); // mov eax,ecx
}
bool mem_readb_checked_x86x(PhysPt address) {
Bitu index=(address>>12);
Bitu uval;
bool retval;
retval=paging.tlb.handler[index]->readb_checked(address, &uval);
core_dyn.readdata=(Bit8u)uval;
return retval;
bool mem_readb_checked_dcx86(PhysPt address) {
return paging.tlb.handler[address>>12]->readb_checked(address, (Bit8u*)(&core_dyn.readdata));
}
static void dyn_read_byte(DynReg * addr,DynReg * dst,Bitu high) {
@ -489,7 +484,7 @@ static void dyn_read_byte(DynReg * addr,DynReg * dst,Bitu high) {
gen_fill_branch(je_loc);
cache_addb(0x51); // push ecx
cache_addb(0xe8);
cache_addd(((Bit32u)&mem_readb_checked_x86x) - (Bit32u)cache.pos-4);
cache_addd(((Bit32u)&mem_readb_checked_dcx86) - (Bit32u)cache.pos-4);
cache_addw(0xc483); // add esp,4
cache_addb(0x04);
cache_addw(0x012c); // sub al,1
@ -527,7 +522,7 @@ static void dyn_read_byte_release(DynReg * addr,DynReg * dst,Bitu high) {
gen_fill_branch(je_loc);
cache_addb(0x51); // push ecx
cache_addb(0xe8);
cache_addd(((Bit32u)&mem_readb_checked_x86x) - (Bit32u)cache.pos-4);
cache_addd(((Bit32u)&mem_readb_checked_dcx86) - (Bit32u)cache.pos-4);
cache_addw(0xc483); // add esp,4
cache_addb(0x04);
cache_addw(0x012c); // sub al,1
@ -546,18 +541,14 @@ static void dyn_read_byte_release(DynReg * addr,DynReg * dst,Bitu high) {
dst->flags|=DYNFLG_CHANGED;
}
bool mem_readd_checked_x86x(PhysPt address) {
bool mem_readd_checked_dcx86(PhysPt address) {
if ((address & 0xfff)<0xffd) {
Bitu index=(address>>12);
if (paging.tlb.read[index]) {
core_dyn.readdata=host_readd(paging.tlb.read[index]+address);
return false;
} else {
Bitu uval;
bool retval;
retval=paging.tlb.handler[index]->readd_checked(address, &uval);
core_dyn.readdata=(Bit32u)uval;
return retval;
return paging.tlb.handler[index]->readd_checked(address, &core_dyn.readdata);
}
} else return mem_unalignedreadd_checked(address, &core_dyn.readdata);
}
@ -589,7 +580,7 @@ static void dyn_read_word(DynReg * addr,DynReg * dst,bool dword) {
gen_fill_branch(je_loc);
cache_addb(0x51); // push ecx
cache_addb(0xe8);
cache_addd(((Bit32u)&mem_readd_checked_x86x) - (Bit32u)cache.pos-4);
cache_addd(((Bit32u)&mem_readd_checked_dcx86) - (Bit32u)cache.pos-4);
cache_addw(0xc483); // add esp,4
cache_addb(0x04);
cache_addw(0x012c); // sub al,1
@ -635,7 +626,7 @@ static void dyn_read_word_release(DynReg * addr,DynReg * dst,bool dword) {
gen_fill_branch(je_loc);
cache_addb(0x51); // push ecx
cache_addb(0xe8);
cache_addd(((Bit32u)&mem_readd_checked_x86x) - (Bit32u)cache.pos-4);
cache_addd(((Bit32u)&mem_readd_checked_dcx86) - (Bit32u)cache.pos-4);
cache_addw(0xc483); // add esp,4
cache_addb(0x04);
cache_addw(0x012c); // sub al,1

22
src/cpu/core_dynrec/decoder_basic.h
View file

@ -570,11 +570,7 @@ bool DRC_CALL_CONV mem_readb_checked_drc(PhysPt address) {
*((Bit8u*)(&core_dynrec.readdata))=host_readb(paging.tlb.read[index]+address);
return false;
} else {
Bitu uval;
bool retval;
retval=paging.tlb.handler[index]->readb_checked(address, &uval);
*((Bit8u*)(&core_dynrec.readdata))=(Bit8u)uval;
return retval;
return paging.tlb.handler[index]->readb_checked(address, (Bit8u*)(&core_dynrec.readdata));
}
}
@ -594,13 +590,7 @@ bool DRC_CALL_CONV mem_readw_checked_drc(PhysPt address) {
if (paging.tlb.read[index]) {
*((Bit16u*)(&core_dynrec.readdata))=host_readw(paging.tlb.read[index]+address);
return false;
} else {
Bitu uval;
bool retval;
retval=paging.tlb.handler[index]->readw_checked(address, &uval);
*((Bit16u*)(&core_dynrec.readdata))=(Bit16u)uval;
return retval;
}
} else return paging.tlb.handler[index]->readw_checked(address, (Bit16u*)(&core_dynrec.readdata));
} else return mem_unalignedreadw_checked(address, ((Bit16u*)(&core_dynrec.readdata)));
}
@ -611,13 +601,7 @@ bool DRC_CALL_CONV mem_readd_checked_drc(PhysPt address) {
if (paging.tlb.read[index]) {
*((Bit32u*)(&core_dynrec.readdata))=host_readd(paging.tlb.read[index]+address);
return false;
} else {
Bitu uval;
bool retval;
retval=paging.tlb.handler[index]->readd_checked(address, &uval);
*((Bit32u*)(&core_dynrec.readdata))=(Bit32u)uval;
return retval;
}
} else return paging.tlb.handler[index]->readd_checked(address, (Bit32u*)(&core_dynrec.readdata));
} else return mem_unalignedreadd_checked(address, ((Bit32u*)(&core_dynrec.readdata)));
}

18
src/cpu/paging.cpp
View file

@ -75,14 +75,14 @@ HostPt PageHandler::GetHostWritePt(Bitu /*phys_page*/) {
return 0;
}
bool PageHandler::readb_checked(PhysPt addr, Bitu * val) {
*val=readb(addr); return false;
bool PageHandler::readb_checked(PhysPt addr, Bit8u * val) {
*val=(Bit8u)readb(addr); return false;
}
bool PageHandler::readw_checked(PhysPt addr, Bitu * val) {
*val=readw(addr); return false;
bool PageHandler::readw_checked(PhysPt addr, Bit16u * val) {
*val=(Bit16u)readw(addr); return false;
}
bool PageHandler::readd_checked(PhysPt addr, Bitu * val) {
*val=readd(addr); return false;
bool PageHandler::readd_checked(PhysPt addr, Bit32u * val) {
*val=(Bit32u)readd(addr); return false;
}
bool PageHandler::writeb_checked(PhysPt addr,Bitu val) {
writeb(addr,val); return false;
@ -185,19 +185,19 @@ public:
InitPage(addr,true);
mem_writed(addr,val);
}
bool readb_checked(PhysPt addr, Bitu * val) {
bool readb_checked(PhysPt addr, Bit8u * val) {
if (InitPage(addr,false,true)) {
*val=mem_readb(addr);
return false;
} else return true;
}
bool readw_checked(PhysPt addr, Bitu * val) {
bool readw_checked(PhysPt addr, Bit16u * val) {
if (InitPage(addr,false,true)){
*val=mem_readw(addr);
return false;
} else return true;
}
bool readd_checked(PhysPt addr, Bitu * val) {
bool readd_checked(PhysPt addr, Bit32u * val) {
if (InitPage(addr,false,true)) {
*val=mem_readd(addr);
return false;