clean up memory access functions
Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@3003
This commit is contained in:
Sebastian Strohhäcker
parent
cd5a157a34
commit
d0b4e12779
6 changed files with 108 additions and 162 deletions
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@ -16,7 +16,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/* $Id: paging.h,v 1.25 2007-06-12 20:22:07 c2woody Exp $ */
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/* $Id: paging.h,v 1.26 2007-09-29 13:23:59 c2woody Exp $ */
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#ifndef DOSBOX_PAGING_H
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#define DOSBOX_PAGING_H
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@ -169,10 +169,10 @@ Bit32u mem_unalignedreadd(PhysPt address);
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void mem_unalignedwritew(PhysPt address,Bit16u val);
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void mem_unalignedwrited(PhysPt address,Bit32u val);
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bool mem_unalignedreadw_checked_x86(PhysPt address,Bit16u * val);
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bool mem_unalignedreadd_checked_x86(PhysPt address,Bit32u * val);
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bool mem_unalignedwritew_checked_x86(PhysPt address,Bit16u val);
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bool mem_unalignedwrited_checked_x86(PhysPt address,Bit32u val);
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bool mem_unalignedreadw_checked(PhysPt address,Bit16u * val);
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bool mem_unalignedreadd_checked(PhysPt address,Bit32u * val);
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bool mem_unalignedwritew_checked(PhysPt address,Bit16u val);
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bool mem_unalignedwrited_checked(PhysPt address,Bit32u val);
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/* Special inlined memory reading/writing */
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@ -183,7 +183,7 @@ INLINE Bit8u mem_readb_inline(PhysPt address) {
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}
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INLINE Bit16u mem_readw_inline(PhysPt address) {
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if (!(address & 1)) {
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if ((address & 0xfff)<0xfff) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) return host_readw(paging.tlb.read[index]+address);
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@ -192,7 +192,7 @@ INLINE Bit16u mem_readw_inline(PhysPt address) {
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}
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INLINE Bit32u mem_readd_inline(PhysPt address) {
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if (!(address & 3)) {
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if ((address & 0xfff)<0xffd) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) return host_readd(paging.tlb.read[index]+address);
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@ -208,7 +208,7 @@ INLINE void mem_writeb_inline(PhysPt address,Bit8u val) {
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}
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INLINE void mem_writew_inline(PhysPt address,Bit16u val) {
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if (!(address & 1)) {
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if ((address & 0xfff)<0xfff) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) host_writew(paging.tlb.write[index]+address,val);
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@ -217,43 +217,6 @@ INLINE void mem_writew_inline(PhysPt address,Bit16u val) {
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}
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INLINE void mem_writed_inline(PhysPt address,Bit32u val) {
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if (!(address & 3)) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) host_writed(paging.tlb.write[index]+address,val);
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else paging.tlb.handler[index]->writed(address,val);
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} else mem_unalignedwrited(address,val);
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}
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INLINE Bit16u mem_readw_dyncorex86(PhysPt address) {
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if ((address & 0xfff)<0xfff) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) return host_readw(paging.tlb.read[index]+address);
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else return (Bit16u)paging.tlb.handler[index]->readw(address);
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} else return mem_unalignedreadw(address);
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}
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INLINE Bit32u mem_readd_dyncorex86(PhysPt address) {
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if ((address & 0xfff)<0xffd) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) return host_readd(paging.tlb.read[index]+address);
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else return paging.tlb.handler[index]->readd(address);
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} else return mem_unalignedreadd(address);
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}
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INLINE void mem_writew_dyncorex86(PhysPt address,Bit16u val) {
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if ((address & 0xfff)<0xfff) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) host_writew(paging.tlb.write[index]+address,val);
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else paging.tlb.handler[index]->writew(address,val);
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} else mem_unalignedwritew(address,val);
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}
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INLINE void mem_writed_dyncorex86(PhysPt address,Bit32u val) {
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if ((address & 0xfff)<0xffd) {
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Bitu index=(address>>12);
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@ -263,7 +226,7 @@ INLINE void mem_writed_dyncorex86(PhysPt address,Bit32u val) {
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}
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INLINE bool mem_readb_checked_x86(PhysPt address, Bit8u * val) {
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INLINE bool mem_readb_checked(PhysPt address, Bit8u * val) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) {
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*val=host_readb(paging.tlb.read[index]+address);
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@ -277,7 +240,7 @@ INLINE bool mem_readb_checked_x86(PhysPt address, Bit8u * val) {
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}
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}
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INLINE bool mem_readw_checked_x86(PhysPt address, Bit16u * val) {
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INLINE bool mem_readw_checked(PhysPt address, Bit16u * val) {
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if ((address & 0xfff)<0xfff) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) {
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@ -290,11 +253,10 @@ INLINE bool mem_readw_checked_x86(PhysPt address, Bit16u * val) {
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*val=(Bit16u)uval;
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return retval;
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}
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} else return mem_unalignedreadw_checked_x86(address, val);
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} else return mem_unalignedreadw_checked(address, val);
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}
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INLINE bool mem_readd_checked_x86(PhysPt address, Bit32u * val) {
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INLINE bool mem_readd_checked(PhysPt address, Bit32u * val) {
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if ((address & 0xfff)<0xffd) {
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Bitu index=(address>>12);
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if (paging.tlb.read[index]) {
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@ -307,10 +269,10 @@ INLINE bool mem_readd_checked_x86(PhysPt address, Bit32u * val) {
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*val=(Bit32u)uval;
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return retval;
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}
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} else return mem_unalignedreadd_checked_x86(address, val);
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} else return mem_unalignedreadd_checked(address, val);
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}
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INLINE bool mem_writeb_checked_x86(PhysPt address,Bit8u val) {
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INLINE bool mem_writeb_checked(PhysPt address,Bit8u val) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) {
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host_writeb(paging.tlb.write[index]+address,val);
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@ -318,24 +280,24 @@ INLINE bool mem_writeb_checked_x86(PhysPt address,Bit8u val) {
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} else return paging.tlb.handler[index]->writeb_checked(address,val);
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}
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INLINE bool mem_writew_checked_x86(PhysPt address,Bit16u val) {
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INLINE bool mem_writew_checked(PhysPt address,Bit16u val) {
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if ((address & 0xfff)<0xfff) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) {
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host_writew(paging.tlb.write[index]+address,val);
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return false;
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} else return paging.tlb.handler[index]->writew_checked(address,val);
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} else return mem_unalignedwritew_checked_x86(address,val);
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} else return mem_unalignedwritew_checked(address,val);
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}
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INLINE bool mem_writed_checked_x86(PhysPt address,Bit32u val) {
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INLINE bool mem_writed_checked(PhysPt address,Bit32u val) {
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if ((address & 0xfff)<0xffd) {
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Bitu index=(address>>12);
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if (paging.tlb.write[index]) {
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host_writed(paging.tlb.write[index]+address,val);
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return false;
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} else return paging.tlb.handler[index]->writed_checked(address,val);
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} else return mem_unalignedwrited_checked_x86(address,val);
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} else return mem_unalignedwrited_checked(address,val);
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}
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@ -53,7 +53,7 @@ static struct DynDecode {
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static bool MakeCodePage(Bitu lin_addr,CodePageHandler * &cph) {
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Bit8u rdval;
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//Ensure page contains memory:
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if (GCC_UNLIKELY(mem_readb_checked_x86(lin_addr,&rdval))) return true;
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if (GCC_UNLIKELY(mem_readb_checked(lin_addr,&rdval))) return true;
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Bitu lin_page=lin_addr >> 12;
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PageHandler * handler=paging.tlb.handler[lin_page];
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if (handler->flags & PFLAG_HASCODE) {
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@ -386,52 +386,52 @@ static void dyn_fill_blocks(void) {
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#if !defined(X86_INLINED_MEMACCESS)
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static void dyn_read_byte(DynReg * addr,DynReg * dst,Bitu high) {
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gen_protectflags();
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gen_call_function((void *)&mem_readb_checked_x86,"%Dd%Id",addr,&core_dyn.readdata);
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gen_call_function((void *)&mem_readb_checked,"%Dd%Id",addr,&core_dyn.readdata);
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dyn_check_bool_exception_al();
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gen_mov_host(&core_dyn.readdata,dst,1,high);
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}
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static void dyn_write_byte(DynReg * addr,DynReg * val,Bitu high) {
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gen_protectflags();
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if (high) gen_call_function((void *)&mem_writeb_checked_x86,"%Dd%Dh",addr,val);
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else gen_call_function((void *)&mem_writeb_checked_x86,"%Dd%Dd",addr,val);
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if (high) gen_call_function((void *)&mem_writeb_checked,"%Dd%Dh",addr,val);
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else gen_call_function((void *)&mem_writeb_checked,"%Dd%Dd",addr,val);
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dyn_check_bool_exception_al();
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}
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static void dyn_read_word(DynReg * addr,DynReg * dst,bool dword) {
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gen_protectflags();
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if (dword) gen_call_function((void *)&mem_readd_checked_x86,"%Dd%Id",addr,&core_dyn.readdata);
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else gen_call_function((void *)&mem_readw_checked_x86,"%Dd%Id",addr,&core_dyn.readdata);
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if (dword) gen_call_function((void *)&mem_readd_checked,"%Dd%Id",addr,&core_dyn.readdata);
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else gen_call_function((void *)&mem_readw_checked,"%Dd%Id",addr,&core_dyn.readdata);
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dyn_check_bool_exception_al();
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gen_mov_host(&core_dyn.readdata,dst,dword?4:2);
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}
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static void dyn_write_word(DynReg * addr,DynReg * val,bool dword) {
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gen_protectflags();
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if (dword) gen_call_function((void *)&mem_writed_checked_x86,"%Dd%Dd",addr,val);
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else gen_call_function((void *)&mem_writew_checked_x86,"%Dd%Dd",addr,val);
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if (dword) gen_call_function((void *)&mem_writed_checked,"%Dd%Dd",addr,val);
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else gen_call_function((void *)&mem_writew_checked,"%Dd%Dd",addr,val);
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dyn_check_bool_exception_al();
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}
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static void dyn_read_byte_release(DynReg * addr,DynReg * dst,Bitu high) {
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gen_protectflags();
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gen_call_function((void *)&mem_readb_checked_x86,"%Ddr%Id",addr,&core_dyn.readdata);
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gen_call_function((void *)&mem_readb_checked,"%Ddr%Id",addr,&core_dyn.readdata);
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dyn_check_bool_exception_al();
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gen_mov_host(&core_dyn.readdata,dst,1,high);
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}
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static void dyn_write_byte_release(DynReg * addr,DynReg * val,Bitu high) {
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gen_protectflags();
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if (high) gen_call_function((void *)&mem_writeb_checked_x86,"%Ddr%Dh",addr,val);
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else gen_call_function((void *)&mem_writeb_checked_x86,"%Ddr%Dd",addr,val);
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if (high) gen_call_function((void *)&mem_writeb_checked,"%Ddr%Dh",addr,val);
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else gen_call_function((void *)&mem_writeb_checked,"%Ddr%Dd",addr,val);
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dyn_check_bool_exception_al();
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}
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static void dyn_read_word_release(DynReg * addr,DynReg * dst,bool dword) {
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gen_protectflags();
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if (dword) gen_call_function((void *)&mem_readd_checked_x86,"%Ddr%Id",addr,&core_dyn.readdata);
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else gen_call_function((void *)&mem_readw_checked_x86,"%Ddr%Id",addr,&core_dyn.readdata);
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if (dword) gen_call_function((void *)&mem_readd_checked,"%Ddr%Id",addr,&core_dyn.readdata);
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else gen_call_function((void *)&mem_readw_checked,"%Ddr%Id",addr,&core_dyn.readdata);
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dyn_check_bool_exception_al();
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gen_mov_host(&core_dyn.readdata,dst,dword?4:2);
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}
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static void dyn_write_word_release(DynReg * addr,DynReg * val,bool dword) {
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gen_protectflags();
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if (dword) gen_call_function((void *)&mem_writed_checked_x86,"%Ddr%Dd",addr,val);
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else gen_call_function((void *)&mem_writew_checked_x86,"%Ddr%Dd",addr,val);
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if (dword) gen_call_function((void *)&mem_writed_checked,"%Ddr%Dd",addr,val);
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else gen_call_function((void *)&mem_writew_checked,"%Ddr%Dd",addr,val);
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dyn_check_bool_exception_al();
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}
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@ -559,7 +559,7 @@ bool mem_readd_checked_x86x(PhysPt address) {
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core_dyn.readdata=(Bit32u)uval;
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return retval;
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}
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} else return mem_unalignedreadd_checked_x86(address, &core_dyn.readdata);
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} else return mem_unalignedreadd_checked(address, &core_dyn.readdata);
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}
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static void dyn_read_word(DynReg * addr,DynReg * dst,bool dword) {
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@ -602,7 +602,7 @@ static void dyn_read_word(DynReg * addr,DynReg * dst,bool dword) {
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gen_fill_jump(jmp_loc);
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} else {
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gen_protectflags();
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gen_call_function((void *)&mem_readw_checked_x86,"%Dd%Id",addr,&core_dyn.readdata);
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gen_call_function((void *)&mem_readw_checked,"%Dd%Id",addr,&core_dyn.readdata);
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dyn_check_bool_exception_al();
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gen_mov_host(&core_dyn.readdata,dst,2);
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}
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@ -648,7 +648,7 @@ static void dyn_read_word_release(DynReg * addr,DynReg * dst,bool dword) {
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gen_fill_jump(jmp_loc);
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} else {
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gen_protectflags();
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gen_call_function((void *)&mem_readw_checked_x86,"%Ddr%Id",addr,&core_dyn.readdata);
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gen_call_function((void *)&mem_readw_checked,"%Ddr%Id",addr,&core_dyn.readdata);
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dyn_check_bool_exception_al();
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gen_mov_host(&core_dyn.readdata,dst,2);
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}
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@ -709,7 +709,7 @@ static void dyn_write_byte(DynReg * addr,DynReg * val,bool high) {
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cache_addb(0x50); // push eax
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if (GCC_UNLIKELY(high)) cache_addw(0xe086+((genreg->index+(genreg->index<<3))<<8));
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cache_addb(0xe8);
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cache_addd(((Bit32u)&mem_writeb_checked_x86) - (Bit32u)cache.pos-4);
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cache_addd(((Bit32u)&mem_writeb_checked) - (Bit32u)cache.pos-4);
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cache_addw(0xc483); // add esp,8
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cache_addb(0x08);
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cache_addw(0x012c); // sub al,1
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@ -748,7 +748,7 @@ static void dyn_write_byte_release(DynReg * addr,DynReg * val,bool high) {
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cache_addb(0x50); // push eax
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if (GCC_UNLIKELY(high)) cache_addw(0xe086+((genreg->index+(genreg->index<<3))<<8));
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cache_addb(0xe8);
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cache_addd(((Bit32u)&mem_writeb_checked_x86) - (Bit32u)cache.pos-4);
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cache_addd(((Bit32u)&mem_writeb_checked) - (Bit32u)cache.pos-4);
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cache_addw(0xc483); // add esp,8
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cache_addb(0x08);
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cache_addw(0x012c); // sub al,1
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@ -792,7 +792,7 @@ static void dyn_write_word(DynReg * addr,DynReg * val,bool dword) {
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cache_addb(0x50+genreg->index);
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cache_addb(0x50); // push eax
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cache_addb(0xe8);
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cache_addd(((Bit32u)&mem_writed_checked_x86) - (Bit32u)cache.pos-4);
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cache_addd(((Bit32u)&mem_writed_checked) - (Bit32u)cache.pos-4);
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cache_addw(0xc483); // add esp,8
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cache_addb(0x08);
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cache_addw(0x012c); // sub al,1
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@ -807,7 +807,7 @@ static void dyn_write_word(DynReg * addr,DynReg * val,bool dword) {
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gen_fill_jump(jmp_loc);
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} else {
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gen_protectflags();
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gen_call_function((void *)&mem_writew_checked_x86,"%Dd%Dd",addr,val);
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gen_call_function((void *)&mem_writew_checked,"%Dd%Dd",addr,val);
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dyn_check_bool_exception_al();
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}
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}
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@ -841,7 +841,7 @@ static void dyn_write_word_release(DynReg * addr,DynReg * val,bool dword) {
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cache_addb(0x50+genreg->index);
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cache_addb(0x50); // push eax
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cache_addb(0xe8);
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cache_addd(((Bit32u)&mem_writed_checked_x86) - (Bit32u)cache.pos-4);
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cache_addd(((Bit32u)&mem_writed_checked) - (Bit32u)cache.pos-4);
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cache_addw(0xc483); // add esp,8
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cache_addb(0x08);
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cache_addw(0x012c); // sub al,1
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@ -856,7 +856,7 @@ static void dyn_write_word_release(DynReg * addr,DynReg * val,bool dword) {
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gen_fill_jump(jmp_loc);
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} else {
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gen_protectflags();
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gen_call_function((void *)&mem_writew_checked_x86,"%Ddr%Dd",addr,val);
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gen_call_function((void *)&mem_writew_checked,"%Ddr%Dd",addr,val);
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dyn_check_bool_exception_al();
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}
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}
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@ -888,10 +888,10 @@ static void dyn_push(DynReg * dynreg) {
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gen_dop_word(DOP_OR,true,DREG(NEWESP),DREG(STACK));
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gen_dop_word(DOP_ADD,true,DREG(STACK),DREG(SS));
|
||||
if (decode.big_op) {
|
||||
gen_call_function((void *)&mem_writed_checked_x86,"%Drd%Dd",DREG(STACK),dynreg);
|
||||
gen_call_function((void *)&mem_writed_checked,"%Drd%Dd",DREG(STACK),dynreg);
|
||||
} else {
|
||||
//Can just push the whole 32-bit word as operand
|
||||
gen_call_function((void *)&mem_writew_checked_x86,"%Drd%Dd",DREG(STACK),dynreg);
|
||||
gen_call_function((void *)&mem_writew_checked,"%Drd%Dd",DREG(STACK),dynreg);
|
||||
}
|
||||
dyn_check_bool_exception_al();
|
||||
/* everything was ok, change register now */
|
||||
|
|
@ -906,9 +906,9 @@ static void dyn_pop(DynReg * dynreg,bool checked=true) {
|
|||
gen_dop_word(DOP_ADD,true,DREG(STACK),DREG(SS));
|
||||
if (checked) {
|
||||
if (decode.big_op) {
|
||||
gen_call_function((void *)&mem_readd_checked_x86,"%Drd%Id",DREG(STACK),&core_dyn.readdata);
|
||||
gen_call_function((void *)&mem_readd_checked,"%Drd%Id",DREG(STACK),&core_dyn.readdata);
|
||||
} else {
|
||||
gen_call_function((void *)&mem_readw_checked_x86,"%Drd%Id",DREG(STACK),&core_dyn.readdata);
|
||||
gen_call_function((void *)&mem_readw_checked,"%Drd%Id",DREG(STACK),&core_dyn.readdata);
|
||||
}
|
||||
dyn_check_bool_exception_al();
|
||||
gen_mov_host(&core_dyn.readdata,dynreg,decode.big_op?4:2);
|
||||
|
|
@ -1654,8 +1654,8 @@ static void dyn_pop_ev(void) {
|
|||
if (decode.modrm.mod<3) {
|
||||
dyn_fill_ea();
|
||||
// dyn_write_word_release(DREG(EA),DREG(TMPW),decode.big_op);
|
||||
if (decode.big_op) gen_call_function((void *)&mem_writed_dyncorex86,"%Ddr%Dd",DREG(EA),DREG(TMPW));
|
||||
else gen_call_function((void *)&mem_writew_dyncorex86,"%Ddr%Dd",DREG(EA),DREG(TMPW));
|
||||
if (decode.big_op) gen_call_function((void *)&mem_writed_inline,"%Ddr%Dd",DREG(EA),DREG(TMPW));
|
||||
else gen_call_function((void *)&mem_writew_inline,"%Ddr%Dd",DREG(EA),DREG(TMPW));
|
||||
} else {
|
||||
gen_dop_word(DOP_MOV,decode.big_op,&DynRegs[decode.modrm.rm],DREG(TMPW));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -16,47 +16,47 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: dyn_fpu_dh.h,v 1.4 2007-06-14 17:47:24 c2woody Exp $ */
|
||||
/* $Id: dyn_fpu_dh.h,v 1.5 2007-09-29 13:23:59 c2woody Exp $ */
|
||||
|
||||
#include "dosbox.h"
|
||||
#if C_FPU
|
||||
|
||||
static void FPU_FLD_16(PhysPt addr) {
|
||||
dyn_dh_fpu.temp.m1 = (Bit32u)mem_readw_dyncorex86(addr);
|
||||
dyn_dh_fpu.temp.m1 = (Bit32u)mem_readw(addr);
|
||||
}
|
||||
|
||||
static void FPU_FST_16(PhysPt addr) {
|
||||
mem_writew_dyncorex86(addr,(Bit16u)dyn_dh_fpu.temp.m1);
|
||||
mem_writew(addr,(Bit16u)dyn_dh_fpu.temp.m1);
|
||||
}
|
||||
|
||||
static void FPU_FLD_32(PhysPt addr) {
|
||||
dyn_dh_fpu.temp.m1 = mem_readd_dyncorex86(addr);
|
||||
dyn_dh_fpu.temp.m1 = mem_readd(addr);
|
||||
}
|
||||
|
||||
static void FPU_FST_32(PhysPt addr) {
|
||||
mem_writed_dyncorex86(addr,dyn_dh_fpu.temp.m1);
|
||||
mem_writed(addr,dyn_dh_fpu.temp.m1);
|
||||
}
|
||||
|
||||
static void FPU_FLD_64(PhysPt addr) {
|
||||
dyn_dh_fpu.temp.m1 = mem_readd_dyncorex86(addr);
|
||||
dyn_dh_fpu.temp.m2 = mem_readd_dyncorex86(addr+4);
|
||||
dyn_dh_fpu.temp.m1 = mem_readd(addr);
|
||||
dyn_dh_fpu.temp.m2 = mem_readd(addr+4);
|
||||
}
|
||||
|
||||
static void FPU_FST_64(PhysPt addr) {
|
||||
mem_writed_dyncorex86(addr,dyn_dh_fpu.temp.m1);
|
||||
mem_writed_dyncorex86(addr+4,dyn_dh_fpu.temp.m2);
|
||||
mem_writed(addr,dyn_dh_fpu.temp.m1);
|
||||
mem_writed(addr+4,dyn_dh_fpu.temp.m2);
|
||||
}
|
||||
|
||||
static void FPU_FLD_80(PhysPt addr) {
|
||||
dyn_dh_fpu.temp.m1 = mem_readd_dyncorex86(addr);
|
||||
dyn_dh_fpu.temp.m2 = mem_readd_dyncorex86(addr+4);
|
||||
dyn_dh_fpu.temp.m3 = mem_readw_dyncorex86(addr+8);
|
||||
dyn_dh_fpu.temp.m1 = mem_readd(addr);
|
||||
dyn_dh_fpu.temp.m2 = mem_readd(addr+4);
|
||||
dyn_dh_fpu.temp.m3 = mem_readw(addr+8);
|
||||
}
|
||||
|
||||
static void FPU_FST_80(PhysPt addr) {
|
||||
mem_writed_dyncorex86(addr,dyn_dh_fpu.temp.m1);
|
||||
mem_writed_dyncorex86(addr+4,dyn_dh_fpu.temp.m2);
|
||||
mem_writew_dyncorex86(addr+8,dyn_dh_fpu.temp.m3);
|
||||
mem_writed(addr,dyn_dh_fpu.temp.m1);
|
||||
mem_writed(addr+4,dyn_dh_fpu.temp.m2);
|
||||
mem_writew(addr+8,dyn_dh_fpu.temp.m3);
|
||||
}
|
||||
|
||||
static void FPU_FLDCW_DH(PhysPt addr){
|
||||
|
|
@ -74,35 +74,35 @@ static void FPU_FNINIT_DH(void){
|
|||
|
||||
static void FPU_FSTENV_DH(PhysPt addr){
|
||||
if(!cpu.code.big) {
|
||||
mem_writew_dyncorex86(addr+0,(Bit16u)dyn_dh_fpu.cw);
|
||||
mem_writew_dyncorex86(addr+2,(Bit16u)dyn_dh_fpu.temp.m2);
|
||||
mem_writew_dyncorex86(addr+4,dyn_dh_fpu.temp.m3);
|
||||
mem_writew(addr+0,(Bit16u)dyn_dh_fpu.cw);
|
||||
mem_writew(addr+2,(Bit16u)dyn_dh_fpu.temp.m2);
|
||||
mem_writew(addr+4,dyn_dh_fpu.temp.m3);
|
||||
} else {
|
||||
mem_writed_dyncorex86(addr+0,dyn_dh_fpu.temp.m1);
|
||||
mem_writew_dyncorex86(addr+0,(Bit16u)dyn_dh_fpu.cw);
|
||||
mem_writed_dyncorex86(addr+4,dyn_dh_fpu.temp.m2);
|
||||
mem_writed_dyncorex86(addr+8,dyn_dh_fpu.temp.m3);
|
||||
mem_writed(addr+0,dyn_dh_fpu.temp.m1);
|
||||
mem_writew(addr+0,(Bit16u)dyn_dh_fpu.cw);
|
||||
mem_writed(addr+4,dyn_dh_fpu.temp.m2);
|
||||
mem_writed(addr+8,dyn_dh_fpu.temp.m3);
|
||||
}
|
||||
}
|
||||
|
||||
static void FPU_FLDENV_DH(PhysPt addr){
|
||||
if(!cpu.code.big) {
|
||||
dyn_dh_fpu.cw = (Bit32u)mem_readw_dyncorex86(addr);
|
||||
dyn_dh_fpu.cw = (Bit32u)mem_readw(addr);
|
||||
dyn_dh_fpu.temp.m1 = dyn_dh_fpu.cw|0x3f;
|
||||
dyn_dh_fpu.temp.m2 = (Bit32u)mem_readw_dyncorex86(addr+2);
|
||||
dyn_dh_fpu.temp.m3 = mem_readw_dyncorex86(addr+4);
|
||||
dyn_dh_fpu.temp.m2 = (Bit32u)mem_readw(addr+2);
|
||||
dyn_dh_fpu.temp.m3 = mem_readw(addr+4);
|
||||
} else {
|
||||
dyn_dh_fpu.cw = (Bit32u)mem_readw_dyncorex86(addr);
|
||||
dyn_dh_fpu.temp.m1 = mem_readd_dyncorex86(addr)|0x3f;
|
||||
dyn_dh_fpu.temp.m2 = mem_readd_dyncorex86(addr+4);
|
||||
dyn_dh_fpu.temp.m3 = mem_readw_dyncorex86(addr+8);
|
||||
dyn_dh_fpu.temp.d1 = mem_readw_dyncorex86(addr+10);
|
||||
dyn_dh_fpu.cw = (Bit32u)mem_readw(addr);
|
||||
dyn_dh_fpu.temp.m1 = mem_readd(addr)|0x3f;
|
||||
dyn_dh_fpu.temp.m2 = mem_readd(addr+4);
|
||||
dyn_dh_fpu.temp.m3 = mem_readw(addr+8);
|
||||
dyn_dh_fpu.temp.d1 = mem_readw(addr+10);
|
||||
}
|
||||
}
|
||||
|
||||
static void FPU_FSAVE_DH(PhysPt addr){
|
||||
if (!cpu.code.big) {
|
||||
mem_writew_dyncorex86(addr,(Bit16u)dyn_dh_fpu.cw);
|
||||
mem_writew(addr,(Bit16u)dyn_dh_fpu.cw);
|
||||
addr+=2;
|
||||
mem_writeb(addr++,dyn_dh_fpu.temp_state[0x04]);
|
||||
mem_writeb(addr++,dyn_dh_fpu.temp_state[0x05]);
|
||||
|
|
@ -118,7 +118,7 @@ static void FPU_FSAVE_DH(PhysPt addr){
|
|||
mem_writeb(addr++,dyn_dh_fpu.temp_state[0x19]);
|
||||
for(Bitu i=28;i<108;i++) mem_writeb(addr++,dyn_dh_fpu.temp_state[i]);
|
||||
} else {
|
||||
mem_writew_dyncorex86(addr,(Bit16u)dyn_dh_fpu.cw);
|
||||
mem_writew(addr,(Bit16u)dyn_dh_fpu.cw);
|
||||
addr+=2;
|
||||
for(Bitu i=2;i<108;i++) mem_writeb(addr++,dyn_dh_fpu.temp_state[i]);
|
||||
}
|
||||
|
|
@ -126,7 +126,7 @@ static void FPU_FSAVE_DH(PhysPt addr){
|
|||
|
||||
static void FPU_FRSTOR_DH(PhysPt addr){
|
||||
if (!cpu.code.big) {
|
||||
dyn_dh_fpu.cw = (Bit32u)mem_readw_dyncorex86(addr);
|
||||
dyn_dh_fpu.cw = (Bit32u)mem_readw(addr);
|
||||
dyn_dh_fpu.temp_state[0x00] = mem_readb(addr++)|0x3f;
|
||||
dyn_dh_fpu.temp_state[0x01] = mem_readb(addr++);
|
||||
dyn_dh_fpu.temp_state[0x04] = mem_readb(addr++);
|
||||
|
|
@ -143,7 +143,7 @@ static void FPU_FRSTOR_DH(PhysPt addr){
|
|||
dyn_dh_fpu.temp_state[0x19] = mem_readb(addr++);
|
||||
for(Bitu i=28;i<108;i++) dyn_dh_fpu.temp_state[i] = mem_readb(addr++);
|
||||
} else {
|
||||
dyn_dh_fpu.cw = (Bit32u)mem_readw_dyncorex86(addr);
|
||||
dyn_dh_fpu.cw = (Bit32u)mem_readw(addr);
|
||||
for(Bitu i=0;i<108;i++) dyn_dh_fpu.temp_state[i] = mem_readb(addr++);
|
||||
dyn_dh_fpu.temp_state[0]|=0x3f;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -925,9 +925,9 @@ static void gen_call_write(DynReg * dr,Bit32u val,Bitu write_size) {
|
|||
/* Do the actual call to the procedure */
|
||||
cache_addb(0xe8);
|
||||
switch (write_size) {
|
||||
case 1: cache_addd((Bit32u)mem_writeb_checked_x86 - (Bit32u)cache.pos-4); break;
|
||||
case 2: cache_addd((Bit32u)mem_writew_checked_x86 - (Bit32u)cache.pos-4); break;
|
||||
case 4: cache_addd((Bit32u)mem_writed_checked_x86 - (Bit32u)cache.pos-4); break;
|
||||
case 1: cache_addd((Bit32u)mem_writeb_checked - (Bit32u)cache.pos-4); break;
|
||||
case 2: cache_addd((Bit32u)mem_writew_checked - (Bit32u)cache.pos-4); break;
|
||||
case 4: cache_addd((Bit32u)mem_writed_checked - (Bit32u)cache.pos-4); break;
|
||||
default: IllegalOption("gen_call_write");
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -130,7 +130,7 @@ static struct DynDecode {
|
|||
static bool MakeCodePage(Bitu lin_addr,CodePageHandlerDynRec * &cph) {
|
||||
Bit8u rdval;
|
||||
//Ensure page contains memory:
|
||||
if (GCC_UNLIKELY(mem_readb_checked_x86(lin_addr,&rdval))) return true;
|
||||
if (GCC_UNLIKELY(mem_readb_checked(lin_addr,&rdval))) return true;
|
||||
|
||||
Bitu lin_page=lin_addr >> 12;
|
||||
|
||||
|
|
@ -589,12 +589,8 @@ bool DRC_CALL_CONV mem_writeb_checked_drc(PhysPt address,Bit8u val) {
|
|||
|
||||
bool DRC_CALL_CONV mem_readw_checked_drc(PhysPt address) DRC_FC;
|
||||
bool DRC_CALL_CONV mem_readw_checked_drc(PhysPt address) {
|
||||
#if defined(WORDS_BIGENDIAN) || !defined(C_UNALIGNED_MEMORY)
|
||||
if (!(address & 1)) {
|
||||
#else
|
||||
if ((address & 0xfff)<0xfff) {
|
||||
#endif
|
||||
Bitu index=(address>>12);
|
||||
Bitu index=(address>>12);
|
||||
if (paging.tlb.read[index]) {
|
||||
*((Bit16u*)(&core_dynrec.readdata))=host_readw(paging.tlb.read[index]+address);
|
||||
return false;
|
||||
|
|
@ -605,16 +601,12 @@ bool DRC_CALL_CONV mem_readw_checked_drc(PhysPt address) {
|
|||
*((Bit16u*)(&core_dynrec.readdata))=(Bit16u)uval;
|
||||
return retval;
|
||||
}
|
||||
} else return mem_unalignedreadw_checked_x86(address, ((Bit16u*)(&core_dynrec.readdata)));
|
||||
} else return mem_unalignedreadw_checked(address, ((Bit16u*)(&core_dynrec.readdata)));
|
||||
}
|
||||
|
||||
bool DRC_CALL_CONV mem_readd_checked_drc(PhysPt address) DRC_FC;
|
||||
bool DRC_CALL_CONV mem_readd_checked_drc(PhysPt address) {
|
||||
#if defined(WORDS_BIGENDIAN) || !defined(C_UNALIGNED_MEMORY)
|
||||
if (!(address & 3)) {
|
||||
#else
|
||||
if ((address & 0xfff)<0xffd) {
|
||||
#endif
|
||||
Bitu index=(address>>12);
|
||||
if (paging.tlb.read[index]) {
|
||||
*((Bit32u*)(&core_dynrec.readdata))=host_readd(paging.tlb.read[index]+address);
|
||||
|
|
@ -626,37 +618,29 @@ bool DRC_CALL_CONV mem_readd_checked_drc(PhysPt address) {
|
|||
*((Bit32u*)(&core_dynrec.readdata))=(Bit32u)uval;
|
||||
return retval;
|
||||
}
|
||||
} else return mem_unalignedreadd_checked_x86(address, ((Bit32u*)(&core_dynrec.readdata)));
|
||||
} else return mem_unalignedreadd_checked(address, ((Bit32u*)(&core_dynrec.readdata)));
|
||||
}
|
||||
|
||||
bool DRC_CALL_CONV mem_writew_checked_drc(PhysPt address,Bit16u val) DRC_FC;
|
||||
bool DRC_CALL_CONV mem_writew_checked_drc(PhysPt address,Bit16u val) {
|
||||
#if defined(WORDS_BIGENDIAN) || !defined(C_UNALIGNED_MEMORY)
|
||||
if (!(address & 1)) {
|
||||
#else
|
||||
if ((address & 0xfff)<0xfff) {
|
||||
#endif
|
||||
Bitu index=(address>>12);
|
||||
if (paging.tlb.write[index]) {
|
||||
host_writew(paging.tlb.write[index]+address,val);
|
||||
return false;
|
||||
} else return paging.tlb.handler[index]->writew_checked(address,val);
|
||||
} else return mem_unalignedwritew_checked_x86(address,val);
|
||||
} else return mem_unalignedwritew_checked(address,val);
|
||||
}
|
||||
|
||||
bool DRC_CALL_CONV mem_writed_checked_drc(PhysPt address,Bit32u val) DRC_FC;
|
||||
bool DRC_CALL_CONV mem_writed_checked_drc(PhysPt address,Bit32u val) {
|
||||
#if defined(WORDS_BIGENDIAN) || !defined(C_UNALIGNED_MEMORY)
|
||||
if (!(address & 3)) {
|
||||
#else
|
||||
if ((address & 0xfff)<0xffd) {
|
||||
#endif
|
||||
Bitu index=(address>>12);
|
||||
if (paging.tlb.write[index]) {
|
||||
host_writed(paging.tlb.write[index]+address,val);
|
||||
return false;
|
||||
} else return paging.tlb.handler[index]->writed_checked(address,val);
|
||||
} else return mem_unalignedwrited_checked_x86(address,val);
|
||||
} else return mem_unalignedwrited_checked(address,val);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
*/
|
||||
|
||||
/* $Id: memory.cpp,v 1.51 2007-07-19 18:58:39 c2woody Exp $ */
|
||||
/* $Id: memory.cpp,v 1.52 2007-09-29 13:23:59 c2woody Exp $ */
|
||||
|
||||
#include "dosbox.h"
|
||||
#include "mem.h"
|
||||
|
|
@ -447,35 +447,35 @@ void mem_unalignedwrited(PhysPt address,Bit32u val) {
|
|||
}
|
||||
|
||||
|
||||
bool mem_unalignedreadw_checked_x86(PhysPt address, Bit16u * val) {
|
||||
bool mem_unalignedreadw_checked(PhysPt address, Bit16u * val) {
|
||||
Bit8u rval1,rval2;
|
||||
if (mem_readb_checked_x86(address+0, &rval1)) return true;
|
||||
if (mem_readb_checked_x86(address+1, &rval2)) return true;
|
||||
if (mem_readb_checked(address+0, &rval1)) return true;
|
||||
if (mem_readb_checked(address+1, &rval2)) return true;
|
||||
*val=(Bit16u)(((Bit8u)rval1) | (((Bit8u)rval2) << 8));
|
||||
return false;
|
||||
}
|
||||
|
||||
bool mem_unalignedreadd_checked_x86(PhysPt address, Bit32u * val) {
|
||||
bool mem_unalignedreadd_checked(PhysPt address, Bit32u * val) {
|
||||
Bit8u rval1,rval2,rval3,rval4;
|
||||
if (mem_readb_checked_x86(address+0, &rval1)) return true;
|
||||
if (mem_readb_checked_x86(address+1, &rval2)) return true;
|
||||
if (mem_readb_checked_x86(address+2, &rval3)) return true;
|
||||
if (mem_readb_checked_x86(address+3, &rval4)) return true;
|
||||
if (mem_readb_checked(address+0, &rval1)) return true;
|
||||
if (mem_readb_checked(address+1, &rval2)) return true;
|
||||
if (mem_readb_checked(address+2, &rval3)) return true;
|
||||
if (mem_readb_checked(address+3, &rval4)) return true;
|
||||
*val=(Bit32u)(((Bit8u)rval1) | (((Bit8u)rval2) << 8) | (((Bit8u)rval3) << 16) | (((Bit8u)rval4) << 24));
|
||||
return false;
|
||||
}
|
||||
|
||||
bool mem_unalignedwritew_checked_x86(PhysPt address,Bit16u val) {
|
||||
if (mem_writeb_checked_x86(address,(Bit8u)(val & 0xff))) return true;val>>=8;
|
||||
if (mem_writeb_checked_x86(address+1,(Bit8u)(val & 0xff))) return true;
|
||||
bool mem_unalignedwritew_checked(PhysPt address,Bit16u val) {
|
||||
if (mem_writeb_checked(address,(Bit8u)(val & 0xff))) return true;val>>=8;
|
||||
if (mem_writeb_checked(address+1,(Bit8u)(val & 0xff))) return true;
|
||||
return false;
|
||||
}
|
||||
|
||||
bool mem_unalignedwrited_checked_x86(PhysPt address,Bit32u val) {
|
||||
if (mem_writeb_checked_x86(address,(Bit8u)(val & 0xff))) return true;val>>=8;
|
||||
if (mem_writeb_checked_x86(address+1,(Bit8u)(val & 0xff))) return true;val>>=8;
|
||||
if (mem_writeb_checked_x86(address+2,(Bit8u)(val & 0xff))) return true;val>>=8;
|
||||
if (mem_writeb_checked_x86(address+3,(Bit8u)(val & 0xff))) return true;
|
||||
bool mem_unalignedwrited_checked(PhysPt address,Bit32u val) {
|
||||
if (mem_writeb_checked(address,(Bit8u)(val & 0xff))) return true;val>>=8;
|
||||
if (mem_writeb_checked(address+1,(Bit8u)(val & 0xff))) return true;val>>=8;
|
||||
if (mem_writeb_checked(address+2,(Bit8u)(val & 0xff))) return true;val>>=8;
|
||||
if (mem_writeb_checked(address+3,(Bit8u)(val & 0xff))) return true;
|
||||
return false;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue