Changes for new dma routines
Changes for 16-bit register access Changes for 32-bit internal mixing Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1728
This commit is contained in:
Sjoerd van der Berg
parent
8b3fd8a4ae
commit
d7cd5717d6
1 changed files with 84 additions and 93 deletions
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@ -22,7 +22,6 @@
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#include "mixer.h"
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#include "dma.h"
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#include "pic.h"
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#include "hardware.h"
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#include "setup.h"
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#include "programs.h"
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#include "math.h"
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@ -44,6 +43,8 @@ static Bit8u dmatable[6] = { 3, 1, 5, 5, 6, 7 };
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static Bit8u GUSRam[1024*1024]; // 1024K of GUS Ram
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Bit32s AutoAmp=1024;
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struct GFGus {
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Bit8u gRegSelect;
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Bit16u gRegData;
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@ -62,7 +63,7 @@ struct GFGus {
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Bit32s muperchan;
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Bit16u timerReg;
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Bit8u timerReg;
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struct GusTimer {
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Bit16u bytetimer;
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Bit32s countdown;
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@ -99,8 +100,6 @@ struct GFGus {
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#define GUSFIFOSIZE 1024
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static void UseDMA(DmaChannel *useDMA);
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struct IRQFifoEntry {
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Bit8u channum;
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bool WaveIRQ;
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@ -112,6 +111,7 @@ struct IRQFifoDef {
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Bit16s stackpos;
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} IRQFifo;
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static void GUS_DMA_Callback(DmaChannel * chan,DMAEvent event);
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// Routines to manage IRQ requests coming from the GUS
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static void pushIRQ(Bit8u channum, bool WaveIRQ, bool RampIRQ) {
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@ -151,7 +151,7 @@ static void popIRQ(IRQFifoEntry * tmpentry) {
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// Returns a single 16-bit sample from the Gravis's RAM
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INLINE Bit16s GetSample(Bit32u Delta, Bit32u CurAddr, bool eightbit) {
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static INLINE Bit16s GetSample(Bit32u Delta, Bit32u CurAddr, bool eightbit) {
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Bit32u useAddr;
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Bit32u holdAddr;
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useAddr = CurAddr >> 9;
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@ -164,10 +164,10 @@ INLINE Bit16s GetSample(Bit32u Delta, Bit32u CurAddr, bool eightbit) {
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// Interpolate
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Bit8s b1 = (Bit8s)GUSRam[useAddr];
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Bit8s b2 = (Bit8s)GUSRam[useAddr+1];
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Bit16s w1 = b1 << 7;
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Bit16s w2 = b2 << 7;
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Bit16s diff = w2 - w1;
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return (Bit16s)(w1 + (((Bit32s)diff * (Bit32s)(CurAddr & 0x3fe)) >> 10));
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Bit32s w1 = b1 << 8;
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Bit32s w2 = b2 << 8;
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Bit32s diff = w2 - w1;
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return (Bit16s)(w1+((diff*(CurAddr&511))>>9));
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}
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} else {
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@ -188,9 +188,8 @@ INLINE Bit16s GetSample(Bit32u Delta, Bit32u CurAddr, bool eightbit) {
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// Interpolate
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Bit16s w1 = (Bit16s)((Bit16u)GUSRam[useAddr] | ((Bit16u)GUSRam[useAddr+1] << 8));
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Bit16s w2 = (Bit16s)((Bit16u)GUSRam[useAddr+2] | ((Bit16u)GUSRam[useAddr+3] << 8));
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Bit16s diff = w2 - w1;
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return (Bit16s)(w1 + (((Bit32s)diff * (Bit32s)((CurAddr) & 0x3fe)) >> 10)) >> 2;
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Bit32s diff = w2 - w1;
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return (Bit16s)(w1+((diff*(CurAddr&511))>>9));
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}
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}
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}
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@ -377,7 +376,7 @@ public:
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if((voiceCont & 0x10) != 0) {
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dir = !dir;
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} else {
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CurAddr = EndAddr;
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CurAddr = EndAddr - (512-(CurAddr & 511));
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}
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} else {
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@ -404,7 +403,7 @@ public:
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if((voiceCont & 0x10) != 0) {
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dir = !dir;
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} else {
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CurAddr = StartAddr;
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CurAddr = StartAddr+(CurAddr & 511);
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}
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} else {
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@ -561,7 +560,7 @@ static Bit16u ExecuteReadRegister(void) {
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myGUS.irq.DMATC = false;
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PIC_DeActivateIRQ(myGUS.irq1);
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//LOG_MSG("Read sampling status, returned 0x%x", tmpreg);
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//LOG_GUS("Read sampling status, returned 0x%x", tmpreg);
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return (Bit16u)(tmpreg << 8);
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case 0x80: // Channel voice control read register
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@ -575,24 +574,24 @@ static Bit16u ExecuteReadRegister(void) {
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case 0x82: // Channel MSB address register
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if(curchan != NULL) {
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return (curchan->StartAddr >> 16);
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return (Bit16u)(curchan->StartAddr >> 16);
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} else return 0x0000;
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case 0x83: // Channel LSW address register
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if(curchan != NULL) {
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return (curchan->StartAddr & 0xffff);
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return (Bit16u)(curchan->StartAddr & 0xffff);
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} else return 0x0000;
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case 0x89: // Channel volume register
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if(curchan != NULL) {
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return (curchan->CurVolume << 4);
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return ((Bit16u)curchan->CurVolume << 4);
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} else return 0x0000;
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case 0x8a: // Channel MSB current address register
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if(curchan != NULL) {
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return (curchan->CurAddr >> 16);
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return (Bit16u)(curchan->CurAddr >> 16);
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} else return 0x0000;
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case 0x8b: // Channel LSW current address register
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if(curchan != NULL) {
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return (curchan->CurAddr & 0xFFFF);
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return (Bit16u)(curchan->CurAddr & 0xFFFF);
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} else return 0x0000;
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case 0x8d: // Channel volume control register
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if(curchan != NULL) {
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@ -622,11 +621,11 @@ static Bit16u ExecuteReadRegister(void) {
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static void ExecuteGlobRegister(void) {
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int i;
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//LOG_MSG("Access global register %x with %x", myGUS.gRegSelect, myGUS.gRegData);
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//LOG_GUS("Access global register %x with %x", myGUS.gRegSelect, myGUS.gRegData);
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switch(myGUS.gRegSelect) {
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case 0x0: // Channel voice control register
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if(curchan != NULL) {
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curchan->WriteVoiceCtrl((Bit8u)myGUS.gRegData);
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curchan->WriteVoiceCtrl((Bit16u)myGUS.gRegData>>8);
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}
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break;
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case 0x1: // Channel frequency control register
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@ -660,20 +659,20 @@ static void ExecuteGlobRegister(void) {
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break;
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case 0x6: // Channel volume ramp rate register
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if(curchan != NULL) {
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Bit8u tmpdata = (Bit8u)myGUS.gRegData;
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Bit8u tmpdata = (Bit16u)myGUS.gRegData>>8;
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curchan->VolRampRate = tmpdata;
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}
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break;
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case 0x7: // Channel volume ramp start register EEEEMMMM
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if(curchan != NULL) {
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Bit8u tmpdata = (Bit8u)myGUS.gRegData;
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Bit8u tmpdata = (Bit16u)myGUS.gRegData >> 8;
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curchan->VolRampStart = vol8bit[tmpdata];
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curchan->VolRampStartOrg = tmpdata << 4;
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}
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break;
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case 0x8: // Channel volume ramp end register EEEEMMMM
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if(curchan != NULL) {
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Bit8u tmpdata = (Bit8u)myGUS.gRegData;
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Bit8u tmpdata = (Bit16u)myGUS.gRegData >> 8;
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curchan->VolRampEnd = vol8bit[tmpdata];
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curchan->VolRampEndOrg = tmpdata << 4;
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}
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@ -686,7 +685,8 @@ static void ExecuteGlobRegister(void) {
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break;
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case 0xA: // Channel MSB current address register
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if(curchan != NULL) {
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curchan->CurAddr = (curchan->CurAddr & 0xFFFF) | ((Bit32u)myGUS.gRegData << 16);
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Bit32u tmpaddr = ((Bit32u)myGUS.gRegData & 0x1fff) << 16;
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curchan->CurAddr = (curchan->CurAddr & 0xFFFF) | tmpaddr;
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}
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break;
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case 0xB: // Channel LSW current address register
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@ -696,73 +696,68 @@ static void ExecuteGlobRegister(void) {
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break;
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case 0xC: // Channel pan pot register
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if(curchan != NULL) {
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curchan->WritePanPot((Bit8u)myGUS.gRegData);
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curchan->WritePanPot((Bit16u)myGUS.gRegData>>8);
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}
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break;
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case 0xD: // Channel volume control register
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if(curchan != NULL) {
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curchan->WriteVolControl((Bit8u)myGUS.gRegData);
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curchan->WriteVolControl((Bit16u)myGUS.gRegData>>8);
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}
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break;
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case 0xE: // Set active channel register
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myGUS.activechan = (myGUS.gRegData & 31) +1;
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if(myGUS.activechan < 14) myGUS.activechan = 14;
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if(myGUS.activechan > 32) myGUS.activechan = 32;
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myGUS.activechan = (myGUS.gRegData>>8) & 63;
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if(myGUS.activechan < 13) myGUS.activechan = 13;
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if(myGUS.activechan > 31) myGUS.activechan = 31;
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MIXER_Enable(gus_chan,true);
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myGUS.basefreq = (Bit32u)((float)1000000/(1.619695497*(float)myGUS.activechan));
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myGUS.basefreq = (Bit32u)((float)1000000/(1.619695497*(float)(myGUS.activechan+1)));
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float simple;
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simple = (1.0 / (float)GUS_RATE) / 0.000001;
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simple = (1.0f / (float)GUS_RATE) / 0.000001f;
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myGUS.mupersamp = (Bit32s)simple*1024;
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myGUS.muperchan = (Bit32s)((float)1.6 * (float)myGUS.activechan * 1024);
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LOG_GUS("GUS set to %d channels", myGUS.activechan);
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for(i=0;i<myGUS.activechan;i++) { if(guschan[i] != NULL) guschan[i]->UpdateFreqCtrl(); }
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for(i=0;i<=myGUS.activechan;i++) { if(guschan[i] != NULL) guschan[i]->UpdateFreqCtrl(); }
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break;
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case 0x10: // Undocumented register used in Fast Tracker 2
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break;
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case 0x41: // Dma control register
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myGUS.DMAControl = (Bit8u)myGUS.gRegData;
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if ((myGUS.DMAControl & 0x1) != 0) {
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//LOG_MSG("GUS request DMA transfer");
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if(DmaChannels[myGUS.dma1]->enabled) UseDMA(DmaChannels[myGUS.dma1]);
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}
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myGUS.DMAControl = (Bit8u)(myGUS.gRegData>>8);
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DmaChannels[myGUS.dma1]->Register_Callback(
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(myGUS.DMAControl & 0x1) ? GUS_DMA_Callback : 0);
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break;
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case 0x42: // Gravis DRAM DMA address register
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myGUS.dmaAddr = myGUS.gRegData;
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break;
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case 0x43: // MSB Peek/poke DRAM position
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myGUS.gDramAddr = (0xff0000 & myGUS.gDramAddr) | ((Bit32u)myGUS.gRegData);
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break;
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case 0x44: // LSW Peek/poke DRAM position
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myGUS.gDramAddr = (0xffff & myGUS.gDramAddr) | ((Bit32u)myGUS.gRegData) << 16;
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myGUS.gDramAddr = (0xffff & myGUS.gDramAddr) | ((Bit32u)myGUS.gRegData>>8) << 16;
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break;
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case 0x45: // Timer control register. Identical in operation to Adlib's timer
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myGUS.TimerControl = (Bit8u)myGUS.gRegData;
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myGUS.TimerControl = (Bit8u)(myGUS.gRegData>>8);
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if((myGUS.TimerControl & 0x08) !=0) myGUS.timers[1].countdown = myGUS.timers[1].setting;
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if((myGUS.TimerControl & 0x04) !=0) myGUS.timers[0].countdown = myGUS.timers[0].setting;
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myGUS.irq.T1 = false;
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myGUS.irq.T2 = false;
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PIC_DeActivateIRQ(myGUS.irq1);
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break;
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case 0x46: // Timer 1 control
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myGUS.timers[0].bytetimer = (Bit8u)myGUS.gRegData;
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myGUS.timers[0].bytetimer = (Bit8u)(myGUS.gRegData>>8);
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myGUS.timers[0].setting = ((Bit32s)0xff - (Bit32s)myGUS.timers[0].bytetimer) * ((Bit32s)80 << 10);
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myGUS.timers[0].countdown = myGUS.timers[0].setting;
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break;
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case 0x47: // Timer 2 control
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myGUS.timers[1].bytetimer = (Bit8u)myGUS.gRegData;
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myGUS.timers[1].bytetimer = (Bit8u)(myGUS.gRegData>>8);
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myGUS.timers[1].setting = ((Bit32s)0xff - (Bit32s)myGUS.timers[1].bytetimer) * ((Bit32s)360 << 10);
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myGUS.timers[1].countdown = myGUS.timers[1].setting;
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break;
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case 0x49: // DMA sampling control register
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myGUS.SampControl = (Bit8u)myGUS.gRegData;
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if ((myGUS.SampControl & 0x1) != 0) {
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if(DmaChannels[myGUS.dma1]->enabled) UseDMA(DmaChannels[myGUS.dma1]);
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}
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myGUS.SampControl = (Bit8u)(myGUS.gRegData>>8);
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DmaChannels[myGUS.dma1]->Register_Callback(
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(myGUS.SampControl & 0x1) ? GUS_DMA_Callback : 0);
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break;
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case 0x4c: // GUS reset register
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GUSReset();
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@ -775,7 +770,6 @@ static void ExecuteGlobRegister(void) {
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static Bit16u read_gus16(Bit32u port) {
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return ExecuteReadRegister();
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}
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@ -835,7 +829,6 @@ static Bit8u read_gus(Bit32u port) {
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static void write_gus(Bit32u port,Bit8u val) {
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switch(port - GUS_BASE) {
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case 0x200:
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myGUS.mixControl = val;
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@ -846,7 +839,6 @@ static void write_gus(Bit32u port,Bit8u val) {
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case 0x209:
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myGUS.timers[0].active = ((val & 0x1) > 0);
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myGUS.timers[1].active = ((val & 0x2) > 0);
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break;
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case 0x20b:
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if((myGUS.mixControl & 0x40) != 0) {
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@ -876,11 +868,11 @@ static void write_gus(Bit32u port,Bit8u val) {
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myGUS.gRegData = 0;
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break;
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case 0x304:
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myGUS.gRegData = (0x00ff & myGUS.gRegData) | val << 8;
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myGUS.gRegData = (0xff00 & myGUS.gRegData) | val;
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ExecuteGlobRegister();
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break;
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case 0x305:
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myGUS.gRegData = (0xff00 & myGUS.gRegData) | val;
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myGUS.gRegData = (0x00ff & myGUS.gRegData) | val << 8;
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ExecuteGlobRegister();
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break;
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@ -891,51 +883,38 @@ static void write_gus(Bit32u port,Bit8u val) {
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LOG_GUS("Write GUS at port 0x%x with %x", port, val);
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break;
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}
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}
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static void UseDMA(DmaChannel *useDMA) {
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Bit32s dmaaddr = myGUS.dmaAddr << 4;
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static void GUS_DMA_Callback(DmaChannel * chan,DMAEvent event) {
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if (event!=DMA_UNMASKED) return;
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Bitu dmaaddr = myGUS.dmaAddr << 4;
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if((myGUS.DMAControl & 0x2) == 0) {
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//Write data into UltraSound
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Bit32s comsize = useDMA->currcnt;
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useDMA->Read(useDMA->currcnt,&GUSRam[dmaaddr]);
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Bitu read=chan->Read(chan->currcnt+1,&GUSRam[dmaaddr]);
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//Check for 16 or 8bit channel
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read*=(chan->DMA16+1);
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if((myGUS.DMAControl & 0x80) != 0) {
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//Invert the MSB to convert twos compliment form
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int i;
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Bitu i;
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if((myGUS.DMAControl & 0x40) == 0) {
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// 8-bit data
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for(i=dmaaddr;i<(dmaaddr+comsize);i++) GUSRam[i] ^= 0x80;
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for(i=dmaaddr;i<(dmaaddr+read);i++) GUSRam[i] ^= 0x80;
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} else {
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// 16-bit data
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for(i=dmaaddr+1;i<(dmaaddr+comsize-1);i+=2) GUSRam[i] ^= 0x80;
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for(i=dmaaddr+1;i<(dmaaddr+read-1);i+=2) GUSRam[i] ^= 0x80;
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}
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}
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} else {
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//Read data out of UltraSound
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useDMA->Write(useDMA->currcnt,&GUSRam[dmaaddr]);
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chan->Write(chan->currcnt+1,&GUSRam[dmaaddr]);
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}
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/* Raise the TC irq if needed */
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if((myGUS.DMAControl & 0x20) != 0) {
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myGUS.irq.DMATC = true;
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PIC_ActivateIRQ(myGUS.irq1);
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}
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chan->Register_Callback(0);
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}
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static void GUS_DMA_Callback(void *useChannel, bool tc) {
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DmaChannel *myDMA;
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myDMA = (DmaChannel *)useChannel;
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if(tc) {
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if((myGUS.DMAControl & 0x20) != 0) {
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myGUS.irq.DMATC = true;
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PIC_ActivateIRQ(myGUS.irq2);
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}
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} else {
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if ((myGUS.DMAControl & 0x1) != 0) UseDMA(myDMA);
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}
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}
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static void GUS_CallBack(Bit8u * stream,Bit32u len) {
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@ -946,11 +925,10 @@ static void GUS_CallBack(Bit8u * stream,Bit32u len) {
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memset(&buffer[0],0,len*4);
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memset(&tmpbuf[0],0,len*8);
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||||
|
||||
int i,t;
|
||||
for(i=0;i<myGUS.activechan;i++) {
|
||||
Bitu i,t;
|
||||
for(i=0;i<=myGUS.activechan;i++) {
|
||||
if (guschan[i]->playing) {
|
||||
guschan[i]->generateSamples(&buffer[0],len);
|
||||
|
||||
for(t=0;t<len*2;t++) {
|
||||
tmpbuf[t]+=(Bit32s)buffer[t];
|
||||
}
|
||||
|
|
@ -972,7 +950,7 @@ static void GUS_CallBack(Bit8u * stream,Bit32u len) {
|
|||
PIC_ActivateIRQ(myGUS.irq1);
|
||||
}
|
||||
myGUS.irq.T1 = true;
|
||||
//LOG_MSG("T1 timer expire");
|
||||
//LOG_GUS("T1 timer expire");
|
||||
//myGUS.timers[0].countdown = myGUS.timers[0].setting;
|
||||
}
|
||||
}
|
||||
|
|
@ -991,8 +969,23 @@ static void GUS_CallBack(Bit8u * stream,Bit32u len) {
|
|||
}
|
||||
|
||||
|
||||
Bit32s sample;
|
||||
bufptr = (Bit16s *)stream;
|
||||
for(i=0;i<len*2;i++) bufptr[i] = (Bit16s)(tmpbuf[i] & 0xffff);
|
||||
// LOG_GUS("AutoAmp: %i\n",AutoAmp);
|
||||
for(i=0;i<len*2;i++)
|
||||
{
|
||||
sample=(tmpbuf[i]*AutoAmp)>>9;
|
||||
if (sample>32767)
|
||||
{
|
||||
sample=32767;
|
||||
AutoAmp--;
|
||||
} else if (sample<-32768)
|
||||
{
|
||||
sample=-32768;
|
||||
AutoAmp--;
|
||||
}
|
||||
bufptr[i] = (Bit16s)(sample);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -1005,7 +998,7 @@ void MakeTables(void)
|
|||
for(i=0;i<256;i++) {
|
||||
float a,b;
|
||||
a = pow(2.0f,(float)(i >> 4));
|
||||
b = 1.0+((float)(i & 0xf))/(float)16;
|
||||
b = 1.0f+((float)(i & 0xf))/(float)16;
|
||||
a *= b;
|
||||
a /= 16;
|
||||
vol8bit[i] = (Bit16u)a;
|
||||
|
|
@ -1013,7 +1006,7 @@ void MakeTables(void)
|
|||
for(i=0;i<4096;i++) {
|
||||
float a,b;
|
||||
a = pow(2.0f,(float)(i >> 8));
|
||||
b = 1.0+((float)(i & 0xff))/(float)256;
|
||||
b = 1.0f+((float)(i & 0xff))/(float)256;
|
||||
a *= b;
|
||||
a /= 16;
|
||||
vol16bit[i] = (Bit16u)a;
|
||||
|
|
@ -1089,7 +1082,7 @@ void GUS_Init(Section* sec) {
|
|||
PIC_RegisterIRQ(myGUS.irq1,0,"GUS");
|
||||
PIC_RegisterIRQ(myGUS.irq2,0,"GUS");
|
||||
|
||||
DmaChannels[myGUS.dma1]->RegisterCallback(GUS_DMA_Callback);
|
||||
// DmaChannels[myGUS.dma1]->Register_TC_Callback(GUS_DMA_TC_Callback);
|
||||
|
||||
MakeTables();
|
||||
|
||||
|
|
@ -1108,8 +1101,6 @@ void GUS_Init(Section* sec) {
|
|||
// ULTRASND=Port,DMA1,DMA2,IRQ1,IRQ2
|
||||
SHELL_AddAutoexec("SET ULTRASND=%3X,%d,%d,%d,%d",portat,myGUS.dma1,myGUS.dma2,myGUS.irq1,myGUS.irq2);
|
||||
SHELL_AddAutoexec("SET ULTRADIR=%s", myGUS.ultradir);
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue