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New lazy flag headers

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on detection of IRQ leave the core.


Imported-from: https://svn.code.sf.net/p/dosbox/code-0/dosbox/trunk@1087
This commit is contained in:
Sjoerd van der Berg 2003-07-06 13:36:10 +00:00
parent 708d8cb3c3
commit fb98d5571e
4 changed files with 32 additions and 14 deletions
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25
src/cpu/core_16/main.h
View file

@ -585,6 +585,9 @@ restart:
case 0x9d: /* POPF */
SETFLAGSw(Pop_16());
CheckTF();
#ifdef CPU_PIC_CHECK
if (GETFLAG(IF) && PIC_IRQCheck) goto decode_end;
#endif
break;
case 0x9e: /* SAHF */
SETFLAGSb(reg_ah);
@ -798,7 +801,7 @@ restart:
#if C_DEBUG
SAVEIP;
if (DEBUG_Breakpoint()) {
LOADIP;
LEAVECORE;
return 1;
}
LOADIP;
@ -810,7 +813,10 @@ restart:
Bit8u num=Fetchb();
#if C_DEBUG
SAVEIP;
if (DEBUG_IntBreakpoint(num)) return 1;
if (DEBUG_IntBreakpoint(num)) {
LEAVECORE;
return 1;
}
#endif
EXCEPTION(num);
}
@ -825,6 +831,9 @@ restart:
Bit16u pflags=Pop_16();
SETFLAGSw(pflags);
CheckTF();
#ifdef CPU_PIC_CHECK
if (GETFLAG(IF) && PIC_IRQCheck) goto decode_end;
#endif
break;
}
case 0xd0: /* GRP2 Eb,1 */
@ -969,7 +978,7 @@ restart:
Repeat_Normal(true,false);
continue;
case 0xf4: /* HLT */
SAVEIP;
LEAVECORE;
CPU_HLT();
return 0x0;
case 0xf5: /* CMC */
@ -1079,11 +1088,9 @@ restart:
break;
case 0xfb: /* STI */
SETFLAGBIT(IF,true);
if (PIC_IRQCheck) {
SAVEIP;
PIC_runIRQs();
LOADIP;
};
#ifdef CPU_PIC_CHECK
if (GETFLAG(IF) && PIC_IRQCheck) goto decode_end;
#endif
break;
case 0xfc: /* CLD */
SETFLAGBIT(DF,false);
@ -1105,7 +1112,7 @@ restart:
{
Bit32u ret;
Bit16u call=Fetchw();
SAVEIP;
LEAVECORE;
if (call<CB_MAX) {
ret=CallBack_Handlers[call]();
} else {

3
src/cpu/core_16/prefix_66.h
View file

@ -312,6 +312,9 @@ switch(Fetchb()) {
case 0x9d: /* POPFD */
SETFLAGSd(Pop_32())
CheckTF();
#ifdef CPU_PIC_CHECK
if (GETFLAG(IF) && PIC_IRQCheck) goto decode_end;
#endif
break;
case 0xa1: /* MOV EAX,Ow */
reg_eax=LoadMd(GetEADirect[prefix.mark]());

10
src/cpu/core_16/support.h
View file

@ -24,6 +24,10 @@ EAPoint IPPoint;
#define SAVEIP reg_ip=GETIP
#define LOADIP IPPoint=SegBase(cs)+reg_ip
#define LEAVECORE \
SAVEIP; \
FILLFLAGS;
static INLINE void ADDIP(Bit16u add) {
IPPoint=SegBase(cs)+((Bit16u)(((Bit16u)(IPPoint-SegBase(cs)))+(Bit16u)add));
}
@ -42,14 +46,14 @@ static INLINE void ADDIPFAST(Bit16s blah) {
#define EXCEPTION(blah) \
{ \
Bit8u new_num=blah; \
SAVEIP; \
LEAVECORE; \
if (Interrupt(new_num)) { \
if (GETFLAG(TF)) { \
cpudecoder=CPU_Real_16_Slow_Decode_Trap; \
return 0; \
return CBRET_NONE; \
} \
goto decode_start; \
} else return 0; \
} else return CBRET_NONE; \
}
static INLINE Bit8u Fetchb() {

8
src/cpu/slow_16.cpp
View file

@ -20,6 +20,7 @@
#include "dosbox.h"
#include "mem.h"
#include "cpu.h"
#include "lazyflags.h"
#include "inout.h"
#include "callback.h"
#include "pic.h"
@ -57,6 +58,7 @@ extern Bitu cycle_count;
#define CPU_386 //Enable 386 instructions
#define CPU_PREFIX_67 //Enable the 0x67 prefix
#define CPU_PREFIX_COUNT //Enable counting of prefixes
#define CPU_PIC_CHECK //Check for IRQ's on critical moment
#if C_FPU
#define CPU_FPU //Enable FPU escape instructions
@ -64,6 +66,7 @@ extern Bitu cycle_count;
#include "instructions.h"
#include "core_16/support.h"
static Bitu CPU_Real_16_Slow_Decode_Trap(void);
@ -71,11 +74,12 @@ static Bitu CPU_Real_16_Slow_Decode_Trap(void);
static Bitu CPU_Real_16_Slow_Decode(void) {
decode_start:
LOADIP;
flags.type=t_UNKNOWN;
while (CPU_Cycles>0) {
#if C_DEBUG
cycle_count++;
#if C_HEAVY_DEBUG
SAVEIP;
LEAVECORE;
if (DEBUG_HeavyIsBreakpoint()) return 1;
#endif
#endif
@ -88,7 +92,7 @@ decode_start:
CPU_Cycles--;
}
decode_end:
SAVEIP;
LEAVECORE;
return CBRET_NONE;
}